EP910LI44-35 vs EP910LC44-35 Vergleich
Detaillierter Direktvergleich von EP910LI44-35 von Altera und EP910LC44-35 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP910LI44-35 | EP910LC44-35 |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $9,95 | $19,95 |
| Device Family | Altera Classic EPLD | — |
| Series | EP910 | — |
| Architecture | PAL-type macrocell (EPLD) | PAL-type AND/OR array |
| Number of Macrocells | 24 | — |
| Number of External Clocks | 2 | — |
| Maximale Taktfrequenz | 37 MHz | — |
| Propagation Delay (tPD) | 35 ns | 35 ns (max) |
| Process Technology | CMOS | CMOS |
| Versorgungsspannung | [DATA_NEEDED: VCC range] | — |
| Anzahl der Pins | 44 | — |
| Package Type | PLCC-44 (J-lead) | — |
| Montageart | Surface Mount / Through-Hole Socket | Surface Mount |
| Betriebstemperatur | [DATA_NEEDED: temperature grade] | 0C to +70C (commercial) |
| Programmability | UV-erasable / one-time programmable | UV-erasable (windowed ceramic) |
| RoHS-Status | unknown | — |
| Logic Family | Classic EPLD | — |
| Family | — | Classic EPLD (OT sub-family) |
| Macrocells | — | 24 |
| Usable Gates | — | 450 |
| Maximum Frequency (fMAX) | — | 28.6 MHz |
| Total Inputs | — | 36 |
| I/O Pins | — | 24 |
| Global Clocks | — | 2 |
| Supply Voltage (VCC) | — | 5 V (single supply) |
| Gehäuse | — | 44-pin PLCC (J-leaded) |