EP910LI44-35 vs EP910LC44-35 Comparison
Detailed side-by-side comparison of EP910LI44-35 by Altera and EP910LC44-35 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910LI44-35 | EP910LC44-35 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | NRND | NRND |
| Device Family | Altera Classic EPLD | — |
| Series | EP910 | — |
| Architecture | PAL-type macrocell (EPLD) | PAL-type AND/OR array |
| Number of Macrocells | 24 | — |
| Number of External Clocks | 2 | — |
| Maximum Clock Frequency | 37 MHz | — |
| Propagation Delay (tPD) | 35 ns | 35 ns (max) |
| Process Technology | CMOS | CMOS |
| Supply Voltage | [DATA_NEEDED: VCC range] | — |
| Number of Pins | 44 | — |
| Package Type | PLCC-44 (J-lead) | — |
| Mounting Type | Surface Mount / Through-Hole Socket | Surface Mount |
| Operating Temperature | [DATA_NEEDED: temperature grade] | 0C to +70C (commercial) |
| Programmability | UV-erasable / one-time programmable | UV-erasable (windowed ceramic) |
| RoHS Status | unknown | — |
| Logic Family | Classic EPLD | — |
| Family | — | Classic EPLD (OT sub-family) |
| Macrocells | — | 24 |
| Usable Gates | — | 450 |
| Maximum Frequency (fMAX) | — | 28.6 MHz |
| Total Inputs | — | 36 |
| I/O Pins | — | 24 |
| Global Clocks | — | 2 |
| Supply Voltage (VCC) | — | 5 V (single supply) |
| Package | — | 44-pin PLCC (J-leaded) |