EP910LI44-35 vs EP910LI44 Vergleich
Detaillierter Direktvergleich von EP910LI44-35 von Altera und EP910LI44 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP910LI44-35 | EP910LI44 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $9,95 | $8,20 |
| Device Family | Altera Classic EPLD | — |
| Series | EP910 | — |
| Architecture | PAL-type macrocell (EPLD) | PAL-type, CMOS, One-Time-Programmable |
| Number of Macrocells | 24 | — |
| Number of External Clocks | 2 | — |
| Maximale Taktfrequenz | 37 MHz | — |
| Propagation Delay (tPD) | 35 ns | — |
| Process Technology | CMOS | — |
| Versorgungsspannung | [DATA_NEEDED: VCC range] | — |
| Anzahl der Pins | 44 | — |
| Package Type | PLCC-44 (J-lead) | PLCC-44 (J-lead, surface mount) |
| Montageart | Surface Mount / Through-Hole Socket | Surface Mount (PLCC socket compatible) |
| Betriebstemperatur | [DATA_NEEDED: temperature grade] | — |
| Programmability | UV-erasable / one-time programmable | UV-erasable (windowed) or OTP |
| RoHS-Status | unknown | non-compliant (original PLCC-44 lead finish) |
| Logic Family | Classic EPLD | — |
| Family | — | Classic EPLD |
| Macrocells | — | 24 |
| Total Pins | — | 44 |
| Dedicated Inputs | — | 12 |
| Bidirectional I/O | — | 24 |
| Maximum Logic Inputs | — | 36 |
| Maximum Outputs | — | 24 |
| Flip-Flops | — | 24 |
| External Clocks | — | 2 |
| Maximum Propagation Delay | — | [DATA_NEEDED: tpd for unmarked speed grade; speed-grade suffix encodes value: -15 = 15 ns, -20 = 20 ns, -25 = 25 ns, -30 = 30 ns, -35 = 35 ns, -40 = 40 ns, -45 = 45 ns, -50 = 50 ns] |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V (commercial), 4.5 V to 5.5 V (industrial) |
| Operating Temperature (L grade) | — | -40 °C to +85 °C (industrial) |
| Technology | — | CMOS |
| Programming Method | — | Altera Logic Programmer card / Data I/O / third-party EPROM programmers |