EP910LI44-35 vs EP910LI44 对比
详细并排对比 EP910LI44-35 出自 Altera 和 EP910LI44 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP910LI44-35 | EP910LI44 |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $9.95 | $8.20 |
| Device Family | Altera Classic EPLD | — |
| Series | EP910 | — |
| Architecture | PAL-type macrocell (EPLD) | PAL-type, CMOS, One-Time-Programmable |
| Number of Macrocells | 24 | — |
| Number of External Clocks | 2 | — |
| 最大时钟频率 | 37 MHz | — |
| Propagation Delay (tPD) | 35 ns | — |
| Process Technology | CMOS | — |
| 电源电压 | [DATA_NEEDED: VCC range] | — |
| 引脚数 | 44 | — |
| Package Type | PLCC-44 (J-lead) | PLCC-44 (J-lead, surface mount) |
| 安装类型 | Surface Mount / Through-Hole Socket | Surface Mount (PLCC socket compatible) |
| 工作温度 | [DATA_NEEDED: temperature grade] | — |
| Programmability | UV-erasable / one-time programmable | UV-erasable (windowed) or OTP |
| RoHS 状态 | unknown | non-compliant (original PLCC-44 lead finish) |
| Logic Family | Classic EPLD | — |
| Family | — | Classic EPLD |
| Macrocells | — | 24 |
| Total Pins | — | 44 |
| Dedicated Inputs | — | 12 |
| Bidirectional I/O | — | 24 |
| Maximum Logic Inputs | — | 36 |
| Maximum Outputs | — | 24 |
| Flip-Flops | — | 24 |
| External Clocks | — | 2 |
| Maximum Propagation Delay | — | [DATA_NEEDED: tpd for unmarked speed grade; speed-grade suffix encodes value: -15 = 15 ns, -20 = 20 ns, -25 = 25 ns, -30 = 30 ns, -35 = 35 ns, -40 = 40 ns, -45 = 45 ns, -50 = 50 ns] |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V (commercial), 4.5 V to 5.5 V (industrial) |
| Operating Temperature (L grade) | — | -40 °C to +85 °C (industrial) |
| Technology | — | CMOS |
| Programming Method | — | Altera Logic Programmer card / Data I/O / third-party EPROM programmers |