EP910PC-0 vs EP910PI-35 Vergleich
Detaillierter Direktvergleich von EP910PC-0 von Altera und EP910PI-35 von Rochester Electronics. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Rochester Electronics
EP910PI-35 - 24-Macrocell Classic EPLD, 35ns, PDIP-40 | Rochester/Altera
EP910PI-35 ✓ AktivSpezifikationsvergleich
| Parameter | EP910PC-0 | EP910PI-35 |
|---|---|---|
| Marke | Altera | Rochester Electronics |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $8,70 | $27,50 |
| Product Type | EPLD (Erasable Programmable Logic Device) | — |
| Family | Classic EPLD | — |
| Usable Gates | 900 gates | 450 |
| Macrocells | 24 | — |
| Logic Blocks | 6 (4 macrocells each) | — |
| Dedicated Inputs | 10 | 12 |
| I/O Pins | 24 | 24 bidirectional |
| Gehäuse | PDIP-40 (Plastic DIP, 40-pin) | PDIP-40 (Plastic DIP, through-hole) |
| Speed Grade | -0 (slowest) | — |
| Versorgungsspannung | 5 V (single supply) | — |
| Process Technology | CMOS | — |
| Logic Compatibility | 100% TTL emulation | — |
| Betriebstemperatur | 0C to +70C (commercial) | [DATA_NEEDED: operating temperature grade] |
| Programming Method | UV-erasable / OTP | Legacy Altera programming interface (pre-JTAG) |
| Montageart | Through-Hole (DIP) | — |
| Device Family | — | Altera Classic EPLD (EP910) |
| Logic Elements | — | 24 Macrocells |
| Propagation Delay (tPD) | — | 35 ns |
| Maximum Frequency (fMAX) | — | 28.6 MHz |
| Supply Voltage (VCC) | — | 5 V (single supply) |
| Technology | — | CMOS, UV-erasable EPROM |
| Erasure Method | — | UV light (windowed variants) / One-time-programmable (this PI suffix) |
| RoHS-Status | — | unknown |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |