EP910PC-0 vs EP910PI-35 比較
詳細並排比較 EP910PC-0 由 Altera 與 EP910PI-35 由 Rochester Electronics. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Rochester Electronics
EP910PI-35 - 24-Macrocell Classic EPLD, 35ns, PDIP-40 | Rochester/Altera
EP910PI-35 ✓ 啟用中規格比較
| 參數 | EP910PC-0 | EP910PI-35 |
|---|---|---|
| 品牌 | Altera | Rochester Electronics |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | 啟用中 |
| Product Type | EPLD (Erasable Programmable Logic Device) | — |
| Family | Classic EPLD | — |
| Usable Gates | 900 gates | 450 |
| Macrocells | 24 | — |
| Logic Blocks | 6 (4 macrocells each) | — |
| Dedicated Inputs | 10 | 12 |
| I/O Pins | 24 | 24 bidirectional |
| 封裝 | PDIP-40 (Plastic DIP, 40-pin) | PDIP-40 (Plastic DIP, through-hole) |
| Speed Grade | -0 (slowest) | — |
| 供應電壓 | 5 V (single supply) | — |
| Process Technology | CMOS | — |
| Logic Compatibility | 100% TTL emulation | — |
| 工作溫度 | 0C to +70C (commercial) | [DATA_NEEDED: operating temperature grade] |
| Programming Method | UV-erasable / OTP | Legacy Altera programming interface (pre-JTAG) |
| 安裝類型 | Through-Hole (DIP) | — |
| Device Family | — | Altera Classic EPLD (EP910) |
| Logic Elements | — | 24 Macrocells |
| Propagation Delay (tPD) | — | 35 ns |
| Maximum Frequency (fMAX) | — | 28.6 MHz |
| Supply Voltage (VCC) | — | 5 V (single supply) |
| Technology | — | CMOS, UV-erasable EPROM |
| Erasure Method | — | UV light (windowed variants) / One-time-programmable (this PI suffix) |
| RoHS 狀態 | — | unknown |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |