EP910PC-30T vs EP910PI-30T Vergleich
Detaillierter Direktvergleich von EP910PC-30T von Intel und EP910PI-30T von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP910PC-30T | EP910PI-30T |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $9,95 | $10,95 |
| Family | Altera Classic EPLD | Altera Classic EPLD |
| Device | EP910 | — |
| Usable Gates | 900 | 480 |
| Macrocells | 24 | 24 |
| Product Terms | 240 | — |
| Dedicated Inputs | 12 | 10 |
| I/O Pins | 24 | — |
| Propagation Delay (tPD) | 30 ns | 30 ns |
| Maximum Clock Frequency (fCNT) | 33.3 MHz | — |
| Process Technology | CMOS | — |
| Versorgungsspannung | 5 V (TTL compatible) | — |
| Gehäuse | PDIP-40 (Plastic DIP) | — |
| Montageart | Through-Hole | Through-Hole |
| Betriebstemperatur | 0C to +70C (commercial) | -40 C to +85 C (industrial) |
| Logic Compatibility | 100% TTL emulation | — |
| Programming | MAX+PLUS II / UV-erasable | Altera Classic device programmer / MAX+PLUS II flow |
| Product Type | — | EPLD (Erasable Programmable Logic Device) |
| Register (Clock-to-Output) Delay | — | 20 ns |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V (5 V nominal) |
| Technology | — | CMOS, UV-erasable (windowed ceramic) |
| Package Type | — | 40-pin PDIP (ceramic windowed) |
| RoHS-Status | — | [DATA_NEEDED: RoHS status] |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |