EP910PI-35 vs EP910DC-35 Vergleich

Detaillierter Direktvergleich von EP910PI-35 von Rochester Electronics und EP910DC-35 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EP910PI-35 EP910DC-35
Marke Rochester Electronics Altera
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Aktiv Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $27,50 $10,95
Device Family Altera Classic EPLD (EP910) —
Logic Elements 24 Macrocells —
Usable Gates 450 900 gates
Propagation Delay (tPD) 35 ns —
Maximum Frequency (fMAX) 28.6 MHz —
Supply Voltage (VCC) 5 V (single supply) —
Technology CMOS, UV-erasable EPROM CMOS, UV-erasable EPROM cell
I/O Pins 24 bidirectional 24
Dedicated Inputs 12 12
Gehäuse PDIP-40 (Plastic DIP, through-hole) 40-pin CDIP (Ceramic DIP) with quartz window
Programming Method Legacy Altera programming interface (pre-JTAG) JEDEC fuse map via device programmer; UV erase
Betriebstemperatur [DATA_NEEDED: operating temperature grade] 0 °C to +70 °C (commercial)
Erasure Method UV light (windowed variants) / One-time-programmable (this PI suffix) —
RoHS-Status unknown Non-compliant (ceramic DIP with Pb-bearing lead finish)
Lead-Free [DATA_NEEDED: lead-free status] —
Device Type — UV-Erasable CMOS PLD (PAL-type)
Family — Classic EPLD EP910
Architecture — PAL-type sum-of-products AND-OR array
Macrocells — 24
Product Terms — 240
Total Inputs — 36
Propagation Delay (tpd) — 35 ns
Maximale Taktfrequenz — 37 MHz (typical, internal)
Supply Voltage (Vcc) — 4.75 V to 5.25 V (5 V nominal)
Lead Pitch — 2.540 mm
Termination Style — Through-Hole
Lifecycle — Obsolete / last-time-buy from authorized distributors

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