EPC1064LC20 vs EPC1441LI20 Vergleich
Detaillierter Direktvergleich von EPC1064LC20 von Intel und EPC1441LI20 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPC1064LC20 | EPC1441LI20 |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | Memory ICs | Memory ICs |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $9,85 | $8,10 |
| Speichergröße | 65 kb (65,536 bits) | — |
| Speichertyp | OTP Configuration PROM (Flash-based, one-time programmable) | OTP Configuration PROM (PROM) |
| Programmable Type | OTP (One-Time Programmable) | — |
| Schnittstelle | Serial (Passive Serial / daisy-chain compatible) | — |
| Access Time | 90 ns (approximately 10 MHz) | — |
| Supply Voltage (Operating) | 4.5 V to 5.5 V | — |
| Supply Voltage (Nominal) | 5 V | — |
| Betriebstemperatur | 0 C to 70 C (Commercial) | -40 C to +85 C (industrial) |
| Gehäuse / Bauform | 20-PLCC (LC) J-lead, 9x9 mm | — |
| No. of Terminals | 20 | — |
| Terminal Finish | Tin/Lead (Sn/Pb) | — |
| Package Code | QCCJ (PLCC-20 J-lead) | — |
| Package Shape | Square | — |
| Compatible Altera FPGA Families | ACEX 1K, APEX 20K, APEX II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX | — |
| Configuration Modes Supported | Passive Serial (PS) with FPP up to 100 MHz on newer FPGAs | — |
| RoHS-Status | Non-compliant (Sn/Pb finish) | [DATA_NEEDED: RoHS compliance status] |
| MSL-Level | [DATA_NEEDED: MSL level] | [DATA_NEEDED: MSL rating] |
| Lead-Free | No (Sn/Pb terminal finish) | [DATA_NEEDED: lead-free status] |
| Density | — | 441 kbits (440,800 bits) |
| Number of Words | — | 440,800 |
| Bits per Word | — | 1 bit |
| Configuration Interface | — | Altera 4-pin serial (DATA, DCLK, nCONFIG, nSTATUS) |
| Supported FPGA Families | — | ACEX, APEX 20K / 20KC / 20KE, FLEX 10KE, FLEX 10KA, Mercury |
| Versorgungsspannung | — | 3.3 V |
| Gehäuse | — | 20-pin PLCC (J-lead, 9x9 mm) |
| Pin Pitch | — | 1.27 mm |
| Programming Method | — | One-Time-Programmable via Altera programming hardware |
| Configuration Time | — | Depends on FPGA bitstream length and DCLK frequency |