EPC1441PS8 vs EPC144PI8 Vergleich

Detaillierter Direktvergleich von EPC1441PS8 von Intel und EPC144PI8 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EPC1441PS8 EPC144PI8
Marke Intel Intel
Kategorie Memory ICs FPGA & CPLD
Lebenszyklusstatus NRND NRND
Lagerstatus In Stock In Stock
Stückpreis (USD) $3,32 $7,25
Product Type Enhanced Configuration PROM (serial configuration memory) —
Speichertyp One-Time-Programmable Flash OTP Serial Configuration EPROM (UV-erasable package option available)
Memory Density 440 Kbit 144 Kbit (144,096 bits)
Schnittstelle 4-pin serial (nCS, OE, DATA, DCLK) 4-wire serial (DCLK, DATA, nCS, nINIT_STATUS)
Versorgungsspannung 3.3 V typical (compatible with Altera FPGAs) —
Compatible FPGA Families APEX II, APEX 20K (including 20K, 20KC, 20KE), Mercury, ACEX 1K, FLEX 6000, FLEX 10KE, FLEX 10KA —
Gehäuse SOIC-8 (PS8, 150-mil body) PDIP-8 (300 mil)
Montageart Surface Mount Through-hole (THT)
Configuration Controller Built-in (handles address counter, oscillator, tri-state DATA) —
Output Driver Tri-state on DATA pin —
Configuration Speed Higher DCLK rates vs legacy EPC PROMs (per Altera datasheet) —
DC Input Absolute Min -0.3 V (with -2.0 V undershoot tolerance < 20 ns) —
DC Input Absolute Max 7.0 V (with overshoot tolerance < 20 ns) —
Betriebstemperaturbereich [DATA_NEEDED: operating temperature range] —
RoHS-Status unknown [DATA_NEEDED: RoHS compliance]
Programmability OTP (one-time-programmable) One-Time Programmable (OTP) per bitstream; UV-erasable window package variant also exists
Configuration Clock (max) — [DATA_NEEDED: DCLK maximum frequency]
Supply Voltage VCC — [DATA_NEEDED: VCC operating range]
Betriebstemperatur — -40C to +85C (industrial, 'I' suffix)
Pin-Anzahl — 8
Process Technology — CMOS EPROM (1.8 V core option per suffix '8')
Target FPGA Compatibility — Altera FLEX 6000, FLEX 8000, FLEX 10K, APEX 20K (legacy)
Lead-Free — [DATA_NEEDED: lead-free status]
MSL-Level — Not applicable (through-hole)
nINIT_STATUS Output — Open-drain, active-low (per datasheet family convention)
Power-On Reset — Internal automatic (per datasheet family convention)

Datenblätter & Ressourcen

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