EPC144LC20 vs EPC160C100 Vergleich
Detaillierter Direktvergleich von EPC144LC20 von Intel und EPC160C100 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EPC144LC20 - 144KB Serial Config PROM, 20-LCC | Intel (Altera)
EPC144LC20 ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EPC144LC20 | EPC160C100 |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | Memory ICs |
| Lebenszyklusstatus | Letzte Kaufgelegenheit | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $7,10 | $7,20 |
| Memory Capacity | 144 Kbit | — |
| Memory Organization | Serial (one-time programmable) | — |
| Schnittstellentyp | Altera Serial Configuration (DATA, DCLK, nCONFIG, nSTATUS, CONF_DONE) | — |
| Programming Method | In-system via JTAG (IEEE 1149.1 / ByteBlaster / USB-Blaster) | — |
| Supply Voltage (VCC) | 3.0 V to 5.5 V | — |
| Betriebstemperatur | -40C to +85C (industrial) | [DATA_NEEDED: operating temperature range] |
| Configuration Time (typical) | [DATA_NEEDED: configuration time at DCLK = 10 MHz] | — |
| Active Supply Current | [DATA_NEEDED: ICC active] | — |
| Standby Supply Current | [DATA_NEEDED: ICC standby] | — |
| Gehäuse | 20-pin LCC (Leadless Chip Carrier, JLCC-20) | PQFP-100 |
| Pin-Anzahl | 20 | 100 |
| Montageart | Surface Mount | Surface Mount |
| Supported FPGA Families | Altera FLEX 6000 / 8000 / 10K, ACEX 1K, MAX 3000 / 7000, APEX 20K | Altera APEX, Cyclone, Stratix, and other SRAM-based LUT devices |
| MSL-Level | 3 (168 hours) | [DATA_NEEDED: MSL rating] |
| RoHS-Status | [DATA_NEEDED: RoHS compliance status per Intel PCN] | [DATA_NEEDED: RoHS compliance status] |
| Lead-Free | Yes | [DATA_NEEDED: lead-free status] |
| Halogenfrei | [DATA_NEEDED] | — |
| JTAG Compliance | IEEE Std 1149.1 | — |
| Device Type | — | Enhanced Configuration Device (EPC) for SRAM-based LUT FPGAs |
| Configuration Density | — | 160 Mbit equivalent tier |
| Operating Voltage (Core) | — | 3.3 V |
| Programming Interface | — | JTAG (IEEE 1149.1) in-system programmable |
| Configuration Interface | — | Serial / Parallel, Altera nCONFIG/nSTATUS/CONF_DONE protocol |
| Cascade Support | — | Yes (nCASC pin for multi-FPGA daisy chain) |
| Memory Technology | — | Flash-based non-volatile configuration memory |