EPC144LC20 vs EPC160C100 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EPC144LC20 disebabkan oleh Intel dan EPC160C100 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Intel
EPC144LC20 - 144KB Serial Config PROM, 20-LCC | Intel (Altera)
EPC144LC20 ⚠ Bahagian terakhir untuk beli
Pengandingan Spesifikasi
| Parametr | EPC144LC20 | EPC160C100 |
|---|---|---|
| Merek | Intel | Altera |
| Kategori | FPGA & CPLD | Memory ICs |
| Status Lingkungan Hidup | Masa Terakhir Dibeli | Obsolete |
| Memory Capacity | 144 Kbit | — |
| Memory Organization | Serial (one-time programmable) | — |
| Jenis Antaramuka | Altera Serial Configuration (DATA, DCLK, nCONFIG, nSTATUS, CONF_DONE) | — |
| Programming Method | In-system via JTAG (IEEE 1149.1 / ByteBlaster / USB-Blaster) | — |
| Supply Voltage (VCC) | 3.0 V to 5.5 V | — |
| Suhu Operasi | -40C to +85C (industrial) | [DATA_NEEDED: operating temperature range] |
| Configuration Time (typical) | [DATA_NEEDED: configuration time at DCLK = 10 MHz] | — |
| Active Supply Current | [DATA_NEEDED: ICC active] | — |
| Standby Supply Current | [DATA_NEEDED: ICC standby] | — |
| Kemasan | 20-pin LCC (Leadless Chip Carrier, JLCC-20) | PQFP-100 |
| Kiraan Pin | 20 | 100 |
| Jenis Pemasangan | Surface Mount | Surface Mount |
| Supported FPGA Families | Altera FLEX 6000 / 8000 / 10K, ACEX 1K, MAX 3000 / 7000, APEX 20K | Altera APEX, Cyclone, Stratix, and other SRAM-based LUT devices |
| Aras MSL | 3 (168 hours) | [DATA_NEEDED: MSL rating] |
| Status RoHS | [DATA_NEEDED: RoHS compliance status per Intel PCN] | [DATA_NEEDED: RoHS compliance status] |
| Lead-Free | Yes | [DATA_NEEDED: lead-free status] |
| Boson Bebas | [DATA_NEEDED] | — |
| JTAG Compliance | IEEE Std 1149.1 | — |
| Device Type | — | Enhanced Configuration Device (EPC) for SRAM-based LUT FPGAs |
| Configuration Density | — | 160 Mbit equivalent tier |
| Operating Voltage (Core) | — | 3.3 V |
| Programming Interface | — | JTAG (IEEE 1149.1) in-system programmable |
| Configuration Interface | — | Serial / Parallel, Altera nCONFIG/nSTATUS/CONF_DONE protocol |
| Cascade Support | — | Yes (nCASC pin for multi-FPGA daisy chain) |
| Memory Technology | — | Flash-based non-volatile configuration memory |