EPC16UC88 vs EPC16UI88AA Vergleich
Detaillierter Direktvergleich von EPC16UC88 von Altera und EPC16UI88AA von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPC16UC88 | EPC16UI88AA |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | Memory ICs | Memory ICs |
| Lebenszyklusstatus | Unknown | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $0,00 | $15,65 |
| Device Type | In-system programmable configuration PROM for FPGAs | — |
| Configuration Memory Capacity | 16 Mb | — |
| Versorgungsspannung | 3.3 V core and I/O | — |
| Gehäuse | 88-UBGA (11x8) | 88-ball UBGA |
| Package Family | UBGA | — |
| In-System Programmability | IEEE Std. 1532 compatible | — |
| Programming Language Support | Jam Standard Test and Programming Language (STAPL) | — |
| JTAG Boundary Scan | Supported | — |
| nINIT_CONF Function | Allows private JTAG instruction to start FPGA configuration | — |
| Configuration Architecture | Configuration controller and flash memory | — |
| FPGA Configuration Use | Automatic configuration after power-up or system initialization | — |
| Data Output | Configuration data output controlled by OE and nCS | — |
| Output Control | OE and nCS control tri-state buffer and address counter | — |
| Montageart | Surface mount | Surface Mount |
| Package Dimensions | 11 mm x 8 mm | — |
| RoHS-Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance] |
| REACH Status | [DATA_NEEDED: REACH status] | — |
| Betriebstemperatur | [DATA_NEEDED: operating temperature] | [DATA_NEEDED: operating temperature range] |
| Output Current | [DATA_NEEDED: output current] | — |
| Configuration Frequency | [DATA_NEEDED: configuration frequency] | — |
| AEC-Q100 Qualification | [DATA_NEEDED: AEC-Q100 qualification] | — |
| Speichertyp | — | NOR Flash (Enhanced Configuration Device) |
| Speichergröße | — | 16 Mbit |
| Memory Organization | — | 16M x 1 bit |
| Schnittstellentyp | — | Serial FPGA Configuration Bus + JTAG |
| Configuration Clock Frequency | — | 66.7 MHz (max) |
| Supply Voltage (VCC) | — | 3.3 V |
| Output Characteristics | — | 3-STATE |
| Write/Erase Endurance | — | 100,000 cycles |
| Programming Method | — | In-system via JTAG |
| Multi-Page Boot Support | — | Yes (multiple bitstream images) |
| Family | — | Enhanced Configuration Device (EPC4/EPC8/EPC16) |