EPC1LC120 vs EPC1L120 Vergleich
Detaillierter Direktvergleich von EPC1LC120 von Altera und EPC1L120 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EPC1L120 - Altera/Intel Configuration Device 120 kbit Serial | PLCC-20
EPC1L120 ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EPC1LC120 | EPC1L120 |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | Memory ICs | Memory ICs |
| Lebenszyklusstatus | Aktiv | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $9,30 | $7,20 |
| Speichertyp | Serial Configuration Memory (Flash-based, non-volatile) | Configuration EEPROM |
| Memory Density | 1 Mbit | — |
| Serial Clock Frequency (DCLK) | 8 MHz | — |
| Supported FPGA Families | APEX 20K, ACEX 1K, Cyclone, MAX, Mercury, Stratix-class | — |
| Schnittstelle | Altera / Intel proprietary FPGA-configuration serial bus (DATA, DCLK, nCONFIG, nSTATUS, CONF_DONE) | — |
| Gehäuse | LQFP-120 (Low-profile Quad Flat Pack) | PLCC-20 |
| Montageart | Surface Mount | Surface Mount / Through-Hole (socket) |
| Betriebstemperaturbereich | [DATA_NEEDED: operating temperature range] | — |
| Versorgungsspannung | [DATA_NEEDED: VCC range] | — |
| Programming | Factory / JTAG via Altera programming tools | — |
| RoHS-Status | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| MSL-Level | [DATA_NEEDED: MSL rating] | [DATA_NEEDED: MSL level] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Configuration Mode | Serial configuration of SRAM-based FPGAs | — |
| Compatible Bitstream Width | Serial | — |
| Memory Capacity | — | 120 kbit |
| Schnittstellentyp | — | Serial (Altera configuration protocol) |
| Betriebsversorgungsspannung | — | 3.3 V / 5 V |
| Output Compatibility | — | MultiVolt: 1.5 V, 1.8 V, 2.5 V, 3.3 V, 5 V |
| Programmability | — | In-System via JTAG (IEEE 1149.1) |
| JTAG Support | — | Yes (dedicated JTAG port) |
| Reprogram Cycles | — | 100 cycles typical |
| Betriebstemperatur | — | -40C to +85C (industrial) |
| Compatible Altera FPGAs | — | FLEX 6000, FLEX 8000, MAX 7000, MAX 9000 families |
| Cascade Support | — | Yes (multi-FPGA configuration chains) |