EPC1LC120 vs EPC1L120 Comparación
Comparación detallada lado a lado de EPC1LC120 por Altera y EPC1L120 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Intel
EPC1L120 - Altera/Intel Configuration Device 120 kbit Serial | PLCC-20
EPC1L120 ⚠ Última compraComparación de especificaciones
| Parámetro | EPC1LC120 | EPC1L120 |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | Memory ICs | Memory ICs |
| Estado del ciclo de vida | Activo | Última compra |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $9,30 | $7,20 |
| Tipo de memoria | Serial Configuration Memory (Flash-based, non-volatile) | Configuration EEPROM |
| Memory Density | 1 Mbit | — |
| Serial Clock Frequency (DCLK) | 8 MHz | — |
| Supported FPGA Families | APEX 20K, ACEX 1K, Cyclone, MAX, Mercury, Stratix-class | — |
| Interfaz | Altera / Intel proprietary FPGA-configuration serial bus (DATA, DCLK, nCONFIG, nSTATUS, CONF_DONE) | — |
| Encapsulado | LQFP-120 (Low-profile Quad Flat Pack) | PLCC-20 |
| Tipo de montaje | Surface Mount | Surface Mount / Through-Hole (socket) |
| Rango de temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | — |
| Tensión de alimentación | [DATA_NEEDED: VCC range] | — |
| Programming | Factory / JTAG via Altera programming tools | — |
| Estado RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Nivel MSL | [DATA_NEEDED: MSL rating] | [DATA_NEEDED: MSL level] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Configuration Mode | Serial configuration of SRAM-based FPGAs | — |
| Compatible Bitstream Width | Serial | — |
| Memory Capacity | — | 120 kbit |
| Tipo de interfaz | — | Serial (Altera configuration protocol) |
| Tensión de alimentación de funcionamiento | — | 3.3 V / 5 V |
| Output Compatibility | — | MultiVolt: 1.5 V, 1.8 V, 2.5 V, 3.3 V, 5 V |
| Programmability | — | In-System via JTAG (IEEE 1149.1) |
| JTAG Support | — | Yes (dedicated JTAG port) |
| Reprogram Cycles | — | 100 cycles typical |
| Temperatura de funcionamiento | — | -40C to +85C (industrial) |
| Compatible Altera FPGAs | — | FLEX 6000, FLEX 8000, MAX 7000, MAX 9000 families |
| Cascade Support | — | Yes (multi-FPGA configuration chains) |