EPC20LC20U vs EPC2LI20 Vergleich
Detaillierter Direktvergleich von EPC20LC20U von Intel und EPC2LI20 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPC20LC20U | EPC2LI20 |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | Memory ICs | Memory ICs |
| Lebenszyklusstatus | Obsolete | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $8,20 | $5,95 |
| Manufacturer | Altera Corporation (now Intel) | — |
| Funktion | FPGA Configuration Device (Serial Configuration PROM) | Configuration PROM for SRAM-based FPGAs |
| Speichertyp | Non-volatile configuration memory | Flash (in-system programmable) |
| Configuration Interface | Serial (DATA, DCLK, nCS, nINIT_CONF, nSTATUS, OE) | Serial or Byte-wide (parallel) |
| Operating Voltage | 5.0 V (typical) | — |
| Absolute Maximum DC Input | -0.3 V to 7.0 V | — |
| Transient Input Tolerance | -2.0 V undershoot to 7.0 V overshoot (<100 mA, <20 ns) | — |
| Package Type | PLCC-20 (J-lead, plastic leaded chip carrier) | — |
| Pin-Anzahl | 20 | — |
| Montageart | Surface Mount (PLCC socket compatible) | Surface Mount (PLCC socket-compatible) |
| Compatible FPGA Families | Altera FLEX 6000, FLEX 8000, FLEX 10K, APEX, ACEX, early Cyclone | — |
| In-System Programming | Supported via JTAG / Quartus programmer | — |
| RoHS-Status | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Betriebstemperaturbereich | [DATA_NEEDED: industrial/commercial grade] | — |
| Lead-Free / Halogen-Free | [DATA_NEEDED: lead-free status] | — |
| Lebenszyklusstatus | Obsolete / Last-time-buy in distribution | — |
| Speichergröße | — | 1.6 Mb (1,572,864 bits) |
| Programmable Type | — | In System Programmable (ISP) |
| Supply Voltage - Operating | — | 3.0 V to 3.6 V and 4.5 V to 5.5 V (auto-sensing) |
| Betriebstemperatur | — | -40 C to +85 C (Industrial) |
| Gehäuse / Bauform | — | 20-PLCC (J-lead, 9x9 mm) |
| Decompression | — | On-chip (supports compressed bitstreams) |
| JTAG / ISP Interface | — | IEEE 1532 (TCK, TMS, TDI, TDO) |
| Multi-Device Support | — | Yes (daisy-chain configuration) |
| User-Accessible Memory | — | Yes (unused flash available to user logic) |
| MSL-Level | — | [DATA_NEEDED: MSL level] |