EPC20LC20U vs EPC2LI20 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPC20LC20U sa pamamagitan ng Intel at EPC2LI20 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPC20LC20U | EPC2LI20 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | Memory ICs | Memory ICs |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Manufacturer | Altera Corporation (now Intel) | — |
| Fungsi | FPGA Configuration Device (Serial Configuration PROM) | Configuration PROM for SRAM-based FPGAs |
| Uri ng Memory | Non-volatile configuration memory | Flash (in-system programmable) |
| Configuration Interface | Serial (DATA, DCLK, nCS, nINIT_CONF, nSTATUS, OE) | Serial or Byte-wide (parallel) |
| Operating Voltage | 5.0 V (typical) | — |
| Absolute Maximum DC Input | -0.3 V to 7.0 V | — |
| Transient Input Tolerance | -2.0 V undershoot to 7.0 V overshoot (<100 mA, <20 ns) | — |
| Package Type | PLCC-20 (J-lead, plastic leaded chip carrier) | — |
| Bilang ng Pin | 20 | — |
| Uri ng Pagpapasok | Surface Mount (PLCC socket compatible) | Surface Mount (PLCC socket-compatible) |
| Compatible FPGA Families | Altera FLEX 6000, FLEX 8000, FLEX 10K, APEX, ACEX, early Cyclone | — |
| In-System Programming | Supported via JTAG / Quartus programmer | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Hanay ng Temperature na Operasyon | [DATA_NEEDED: industrial/commercial grade] | — |
| Lead-Free / Halogen-Free | [DATA_NEEDED: lead-free status] | — |
| Katayuan ng Lifecycle | Obsolete / Last-time-buy in distribution | — |
| Laki ng Memory | — | 1.6 Mb (1,572,864 bits) |
| Programmable Type | — | In System Programmable (ISP) |
| Supply Voltage - Operating | — | 3.0 V to 3.6 V and 4.5 V to 5.5 V (auto-sensing) |
| Temperature na Operasyon | — | -40 C to +85 C (Industrial) |
| Packhaging / Kaso | — | 20-PLCC (J-lead, 9x9 mm) |
| Decompression | — | On-chip (supports compressed bitstreams) |
| JTAG / ISP Interface | — | IEEE 1532 (TCK, TMS, TDI, TDO) |
| Multi-Device Support | — | Yes (daisy-chain configuration) |
| User-Accessible Memory | — | Yes (unused flash available to user logic) |
| Level ng MSL | — | [DATA_NEEDED: MSL level] |