EPC2LC20 vs EPC20LC20U Vergleich
Detaillierter Direktvergleich von EPC2LC20 von Altera und EPC20LC20U von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPC2LC20 | EPC20LC20U |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | Memory ICs | Memory ICs |
| Lebenszyklusstatus | NRND | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $7,20 | $8,20 |
| Speichertyp | Non-volatile configuration PROM | Non-volatile configuration memory |
| Speichergröße | 1.6 Mbit | — |
| Configuration Interface | Serial (x1) to FPGA via DCLK/nCONFIG/nSTATUS/CONF_DONE | Serial (DATA, DCLK, nCS, nINIT_CONF, nSTATUS, OE) |
| Programming Interface | IEEE 1149.1 (JTAG) ISP, 5.0-V and 3.3-V tolerant | — |
| Supply Voltage VCC | 3.0 V to 3.6 V (3.3-V operation) | — |
| ISP Voltage Range | 5.0 V or 3.3 V | — |
| Supported FPGA Families | ACEX 1K, APEX 20K/20KC/20KE, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, MAX 9000 | — |
| Cascade Support | Yes - daisy-chain multiple EPC2 devices via JTAG for larger bitstreams | — |
| Gehäuse | 20-pin PLCC (J-lead, 9x9 mm) | — |
| Montageart | Surface Mount | Surface Mount (PLCC socket compatible) |
| Betriebstemperatur | -40C to +85C (industrial) [DATA_NEEDED: exact grade from datasheet] | — |
| RoHS-Status | Non-Compliant (original Altera Pb-containing part) | [DATA_NEEDED: RoHS compliance status] |
| Lead-Free Version | EPC2LC20N available as lead-free equivalent | — |
| Programming Support | Altera Programming Unit (APU), Quartus II, JTAG programmer | — |
| Boundary-Scan | IEEE 1149.1 compliant, 8-bit or 16-bit JTAG | — |
| Manufacturer | — | Altera Corporation (now Intel) |
| Funktion | — | FPGA Configuration Device (Serial Configuration PROM) |
| Operating Voltage | — | 5.0 V (typical) |
| Absolute Maximum DC Input | — | -0.3 V to 7.0 V |
| Transient Input Tolerance | — | -2.0 V undershoot to 7.0 V overshoot (<100 mA, <20 ns) |
| Package Type | — | PLCC-20 (J-lead, plastic leaded chip carrier) |
| Pin-Anzahl | — | 20 |
| Compatible FPGA Families | — | Altera FLEX 6000, FLEX 8000, FLEX 10K, APEX, ACEX, early Cyclone |
| In-System Programming | — | Supported via JTAG / Quartus programmer |
| Betriebstemperaturbereich | — | [DATA_NEEDED: industrial/commercial grade] |
| Lead-Free / Halogen-Free | — | [DATA_NEEDED: lead-free status] |
| Lebenszyklusstatus | — | Obsolete / Last-time-buy in distribution |