EPC2LC20 vs EPC20LC20U Comparaison
Comparaison détaillée côte à côte de EPC2LC20 par Altera et EPC20LC20U par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPC2LC20 | EPC20LC20U |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | Memory ICs | Memory ICs |
| Statut du cycle de vie | NRND | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $7,20 | $8,20 |
| Type de mémoire | Non-volatile configuration PROM | Non-volatile configuration memory |
| Taille de mémoire | 1.6 Mbit | — |
| Configuration Interface | Serial (x1) to FPGA via DCLK/nCONFIG/nSTATUS/CONF_DONE | Serial (DATA, DCLK, nCS, nINIT_CONF, nSTATUS, OE) |
| Programming Interface | IEEE 1149.1 (JTAG) ISP, 5.0-V and 3.3-V tolerant | — |
| Supply Voltage VCC | 3.0 V to 3.6 V (3.3-V operation) | — |
| ISP Voltage Range | 5.0 V or 3.3 V | — |
| Supported FPGA Families | ACEX 1K, APEX 20K/20KC/20KE, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, MAX 9000 | — |
| Cascade Support | Yes - daisy-chain multiple EPC2 devices via JTAG for larger bitstreams | — |
| Boîtier | 20-pin PLCC (J-lead, 9x9 mm) | — |
| Type de montage | Surface Mount | Surface Mount (PLCC socket compatible) |
| Température de fonctionnement | -40C to +85C (industrial) [DATA_NEEDED: exact grade from datasheet] | — |
| Statut RoHS | Non-Compliant (original Altera Pb-containing part) | [DATA_NEEDED: RoHS compliance status] |
| Lead-Free Version | EPC2LC20N available as lead-free equivalent | — |
| Programming Support | Altera Programming Unit (APU), Quartus II, JTAG programmer | — |
| Boundary-Scan | IEEE 1149.1 compliant, 8-bit or 16-bit JTAG | — |
| Manufacturer | — | Altera Corporation (now Intel) |
| Fonction | — | FPGA Configuration Device (Serial Configuration PROM) |
| Operating Voltage | — | 5.0 V (typical) |
| Absolute Maximum DC Input | — | -0.3 V to 7.0 V |
| Transient Input Tolerance | — | -2.0 V undershoot to 7.0 V overshoot (<100 mA, <20 ns) |
| Package Type | — | PLCC-20 (J-lead, plastic leaded chip carrier) |
| Nombre de broches | — | 20 |
| Compatible FPGA Families | — | Altera FLEX 6000, FLEX 8000, FLEX 10K, APEX, ACEX, early Cyclone |
| In-System Programming | — | Supported via JTAG / Quartus programmer |
| Plage de température de fonctionnement | — | [DATA_NEEDED: industrial/commercial grade] |
| Lead-Free / Halogen-Free | — | [DATA_NEEDED: lead-free status] |
| Statut du cycle de vie | — | Obsolete / Last-time-buy in distribution |