EPC2LC20NUBAF48 vs EPC1LC20 Vergleich
Detaillierter Direktvergleich von EPC2LC20NUBAF48 von Altera und EPC1LC20 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPC2LC20NUBAF48 | EPC1LC20 |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | Memory ICs |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $16,40 | $7,95 |
| Speichertyp | Non-volatile flash configuration PROM | Non-volatile configuration memory (Flash/EPROM) |
| Memory Density | 2 Mbit (2,097,152 bits) | — |
| Core Supply Voltage (VCC) | 3.3 V (low-voltage 'L' variant) | — |
| I/O Logic Levels | 3.3 V LVCMOS (5V-tolerant inputs) | — |
| Configuration Interface | Altera serial (DATA, DCLK, nCS, ASDO) | — |
| JTAG / ISP Support | IEEE 1532 / JTAG in-system programming | — |
| Cascade Support | Yes - dedicated nCASC pin for 2-device chains | — |
| Programming Voltage | Internal 3.3V generation, no external VPP | — |
| FPGA Compatibility | APEX II, APEX 20K, Mercury, ACEX 1K, FLEX 10K, FLEX 6000 | — |
| Gehäuse | 20-pin Ultra FineLine BGA (UBGA, NU suffix) | 20-pin PLCC (J-leaded, surface mount) |
| Betriebstemperatur | -40C to +85C (industrial) | [DATA_NEEDED: Operating temperature range] |
| Configuration Clock | Internal oscillator (DCLK output to FPGA) | — |
| Programming Tools | Quartus II Programmer, ByteBlaster II, USB-Blaster | — |
| RoHS-Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Memory Capacity | — | 1 Mbit (1,048,576 bits) |
| Schnittstellentyp | — | Serial configuration interface |
| Maximum DCLK Frequency | — | 8 MHz |
| Versorgungsspannung | — | 3.3 V or 5.0 V |
| In-System Programmability | — | Yes (IEEE 1149.1 / JTAG) |
| Programmable Voltage | — | 5.0 V and 3.3 V ISP |
| Configuration Mode | — | Serial, multi-device daisy-chain capable |
| Pin-Anzahl | — | 20 |
| Montageart | — | Surface Mount |
| Compatible FPGA Families | — | ACEX 1K, APEX 20K, FLEX 10K, Cyclone, Mercury |
| JTAG Pins | — | TCK, TMS, TDI, TDO |