EPC2LC20NUBAF48 vs EPC1LC20 Comparaison
Comparaison détaillée côte à côte de EPC2LC20NUBAF48 par Altera et EPC1LC20 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPC2LC20NUBAF48 | EPC1LC20 |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | Memory ICs |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $16,40 | $7,95 |
| Type de mémoire | Non-volatile flash configuration PROM | Non-volatile configuration memory (Flash/EPROM) |
| Memory Density | 2 Mbit (2,097,152 bits) | — |
| Core Supply Voltage (VCC) | 3.3 V (low-voltage 'L' variant) | — |
| I/O Logic Levels | 3.3 V LVCMOS (5V-tolerant inputs) | — |
| Configuration Interface | Altera serial (DATA, DCLK, nCS, ASDO) | — |
| JTAG / ISP Support | IEEE 1532 / JTAG in-system programming | — |
| Cascade Support | Yes - dedicated nCASC pin for 2-device chains | — |
| Programming Voltage | Internal 3.3V generation, no external VPP | — |
| FPGA Compatibility | APEX II, APEX 20K, Mercury, ACEX 1K, FLEX 10K, FLEX 6000 | — |
| Boîtier | 20-pin Ultra FineLine BGA (UBGA, NU suffix) | 20-pin PLCC (J-leaded, surface mount) |
| Température de fonctionnement | -40C to +85C (industrial) | [DATA_NEEDED: Operating temperature range] |
| Configuration Clock | Internal oscillator (DCLK output to FPGA) | — |
| Programming Tools | Quartus II Programmer, ByteBlaster II, USB-Blaster | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Memory Capacity | — | 1 Mbit (1,048,576 bits) |
| Type d'interface | — | Serial configuration interface |
| Maximum DCLK Frequency | — | 8 MHz |
| Tension d'alimentation | — | 3.3 V or 5.0 V |
| In-System Programmability | — | Yes (IEEE 1149.1 / JTAG) |
| Programmable Voltage | — | 5.0 V and 3.3 V ISP |
| Configuration Mode | — | Serial, multi-device daisy-chain capable |
| Nombre de broches | — | 20 |
| Type de montage | — | Surface Mount |
| Compatible FPGA Families | — | ACEX 1K, APEX 20K, FLEX 10K, Cyclone, Mercury |
| JTAG Pins | — | TCK, TMS, TDI, TDO |