EPC2LC20V vs EPC2LC20 Vergleich
Detaillierter Direktvergleich von EPC2LC20V von Intel und EPC2LC20 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPC2LC20V | EPC2LC20 |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | Memory ICs |
| Lebenszyklusstatus | NRND | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $9,95 | $7,20 |
| Product Type | Flash Configuration Device (FPGA configuration PROM) | — |
| Speichergröße | 1.6 Mb (1,678,336 bits) | 1.6 Mbit |
| Configuration Interface | Serial (Passive Serial) or 8-bit parallel | Serial (x1) to FPGA via DCLK/nCONFIG/nSTATUS/CONF_DONE |
| Maximum Configuration Clock | 10 MHz | — |
| Operating Voltage (VCC) | 3.0 V to 3.6 V (3.3 V typ.) | — |
| Program/Erase Cycles | 100,000 cycles minimum | — |
| Data Retention | 20 years minimum | — |
| JTAG Support | IEEE 1149.1 Boundary Scan, in-system programmable | — |
| Gehäuse | PLCC-20 (JEDEC MO-047) | 20-pin PLCC (J-lead, 9x9 mm) |
| Betriebstemperatur | -40C to +85C (industrial) | -40C to +85C (industrial) [DATA_NEEDED: exact grade from datasheet] |
| Storage Temperature | -65C to +150C | — |
| Lead-Free / RoHS | Lead-free (V suffix), RoHS compliant | — |
| Compatible FPGAs | Cyclone, Stratix, APEX 20K, ACEX 1K, FLEX 10K, FLEX 8000 | — |
| On-chip Oscillator | Yes (generates DCLK) | — |
| Configuration Time (typical) | Depends on FPGA bitstream length and clock mode | — |
| MSL-Level | [DATA_NEEDED: MSL level] | — |
| Speichertyp | — | Non-volatile configuration PROM |
| Programming Interface | — | IEEE 1149.1 (JTAG) ISP, 5.0-V and 3.3-V tolerant |
| Supply Voltage VCC | — | 3.0 V to 3.6 V (3.3-V operation) |
| ISP Voltage Range | — | 5.0 V or 3.3 V |
| Supported FPGA Families | — | ACEX 1K, APEX 20K/20KC/20KE, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, MAX 9000 |
| Cascade Support | — | Yes - daisy-chain multiple EPC2 devices via JTAG for larger bitstreams |
| Montageart | — | Surface Mount |
| RoHS-Status | — | Non-Compliant (original Altera Pb-containing part) |
| Lead-Free Version | — | EPC2LC20N available as lead-free equivalent |
| Programming Support | — | Altera Programming Unit (APU), Quartus II, JTAG programmer |
| Boundary-Scan | — | IEEE 1149.1 compliant, 8-bit or 16-bit JTAG |