EPC2LC2QN vs EPC16QC100N Vergleich

Detaillierter Direktvergleich von EPC2LC2QN von Altera und EPC16QC100N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EPC2LC2QN EPC16QC100N
Marke Altera Altera
Kategorie Memory ICs Memory ICs
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $15,20 $24,10
Product Type FPGA Configuration Device —
Configuration Memory Size 2 Mb —
Target Device Family SRAM-Based LUT FPGAs (APEX II, Cyclone, Stratix) —
Core Supply Voltage 3.3 V —
I/O Supply Voltage 3.3 V —
Betriebstemperatur 0°C to +70°C (Commercial) 0 C to 70 C
Gehäuse 100-pin PQFP 100-pin PQFP (20 x 14 mm)
Montageart Surface Mount Surface Mount
Configuration Interface 4-wire Serial (DATA, DCLK, nCONFIG, nSTATUS) FPP / PS / AS via dedicated FPGA pins
Programming Interface JTAG (IEEE 1149.1) —
Bitstream Compression Supported (Altera-compressed format) —
Multi-Device Daisy-Chain Support Yes (up to 8 FPGAs) —
In-System Programmability Yes —
Bitstream Programming Cycles [DATA_NEEDED: minimum endurance cycles] —
RoHS-Status Compliant —
Lead-Free Yes —
MSL-Level [DATA_NEEDED: MSL rating] —
Country of Origin [DATA_NEEDED: COO] —
Speichergröße — 16 Mbit (16,777,216 bits)
Programmable Type — In System Programmable
Configuration Clock Frequency — 33 MHz max
On-Chip Decompression — Yes (supports compressed bitstreams)
Supply Voltage (VCC) — 3.0 V to 3.6 V
Access Time — 90 ns typical
Flash Read Bandwidth — 160 Mbps (16-bit DQ at 10 MHz)
JTAG (IEEE 1149.1) ISP — Supported
Lead Free — Yes (per datasheet)
Packaging — Tray
Supported FPGA Families — ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX

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