EPC2LC2QN vs EPC16QC100N 比較
詳細な並列比較: EPC2LC2QN メーカー: Altera および EPC16QC100N メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPC2LC2QN | EPC16QC100N |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | Memory ICs | Memory ICs |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $15.20 | $24.10 |
| Product Type | FPGA Configuration Device | — |
| Configuration Memory Size | 2 Mb | — |
| Target Device Family | SRAM-Based LUT FPGAs (APEX II, Cyclone, Stratix) | — |
| Core Supply Voltage | 3.3 V | — |
| I/O Supply Voltage | 3.3 V | — |
| 動作温度 | 0°C to +70°C (Commercial) | 0 C to 70 C |
| パッケージ | 100-pin PQFP | 100-pin PQFP (20 x 14 mm) |
| 実装タイプ | Surface Mount | Surface Mount |
| Configuration Interface | 4-wire Serial (DATA, DCLK, nCONFIG, nSTATUS) | FPP / PS / AS via dedicated FPGA pins |
| Programming Interface | JTAG (IEEE 1149.1) | — |
| Bitstream Compression | Supported (Altera-compressed format) | — |
| Multi-Device Daisy-Chain Support | Yes (up to 8 FPGAs) | — |
| In-System Programmability | Yes | — |
| Bitstream Programming Cycles | [DATA_NEEDED: minimum endurance cycles] | — |
| RoHS ステータス | Compliant | — |
| Lead-Free | Yes | — |
| MSLレベル | [DATA_NEEDED: MSL rating] | — |
| Country of Origin | [DATA_NEEDED: COO] | — |
| メモリサイズ | — | 16 Mbit (16,777,216 bits) |
| Programmable Type | — | In System Programmable |
| Configuration Clock Frequency | — | 33 MHz max |
| On-Chip Decompression | — | Yes (supports compressed bitstreams) |
| Supply Voltage (VCC) | — | 3.0 V to 3.6 V |
| Access Time | — | 90 ns typical |
| Flash Read Bandwidth | — | 160 Mbps (16-bit DQ at 10 MHz) |
| JTAG (IEEE 1149.1) ISP | — | Supported |
| Lead Free | — | Yes (per datasheet) |
| Packaging | — | Tray |
| Supported FPGA Families | — | ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX |