EPC2LS20U vs EPC2LI20 Vergleich
Detaillierter Direktvergleich von EPC2LS20U von Altera und EPC2LI20 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPC2LS20U | EPC2LI20 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | Memory ICs | Memory ICs |
| Lebenszyklusstatus | Obsolete | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $4,25 | $5,95 |
| Product Type | In-System Programmable Configuration PROM | — |
| Memory Density | 1.6 Mbit | — |
| Operating Voltage (VCC) | 3.3 V | — |
| Schnittstelle | Altera serial configuration / JTAG | — |
| Programming Method | In-System Programmable (ISP) via JTAG | — |
| Gehäuse | 20-PLCC (J-lead, 9x9 mm) | — |
| Lead-Free / RoHS | Yes (per "U" suffix) | — |
| Betriebstemperatur | [DATA_NEEDED: Operating Temperature] | -40 C to +85 C (Industrial) |
| Supported FPGA Families | Cyclone I/II, Stratix/II, APEX-II, ACEX-1K, FLEX-10K, FLEX-6000, MAX-7000 | — |
| Configuration Modes | PS (Passive Serial), AS, FPP | — |
| JTAG Support | Yes (IEEE 1149.1 boundary scan) | — |
| Done Pin | Yes (open-drain programmable polarity) | — |
| nSTATUS Pin | Yes (open-drain error flag) | — |
| nCONFIG Pin | Yes (reset/reconfiguration input) | — |
| DCLK Output | Yes (configuration clock to FPGA) | — |
| MSL-Level | [DATA_NEEDED: MSL Level] | [DATA_NEEDED: MSL level] |
| Compliance | RoHS (Pb-free per U suffix) | — |
| Speichergröße | — | 1.6 Mb (1,572,864 bits) |
| Speichertyp | — | Flash (in-system programmable) |
| Programmable Type | — | In System Programmable (ISP) |
| Funktion | — | Configuration PROM for SRAM-based FPGAs |
| Supply Voltage - Operating | — | 3.0 V to 3.6 V and 4.5 V to 5.5 V (auto-sensing) |
| Gehäuse / Bauform | — | 20-PLCC (J-lead, 9x9 mm) |
| Montageart | — | Surface Mount (PLCC socket-compatible) |
| Configuration Interface | — | Serial or Byte-wide (parallel) |
| Decompression | — | On-chip (supports compressed bitstreams) |
| JTAG / ISP Interface | — | IEEE 1532 (TCK, TMS, TDI, TDO) |
| Multi-Device Support | — | Yes (daisy-chain configuration) |
| User-Accessible Memory | — | Yes (unused flash available to user logic) |
| RoHS-Status | — | [DATA_NEEDED: RoHS status] |