EPC448JC-30A vs EPC2LC20 Vergleich
Detaillierter Direktvergleich von EPC448JC-30A von Altera und EPC2LC20 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPC448JC-30A | EPC2LC20 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | Memory ICs |
| Lebenszyklusstatus | NRND | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $9,10 | $7,20 |
| Memory Density | 4 Mbit | — |
| Device Family | Enhanced Configuration Device | — |
| Supply Voltage (VCC) | 3.3 V nominal | — |
| Operating Voltage Range | 3.0 V to 3.6 V | — |
| Access Time | 30 ns | — |
| Configuration Interface | Altera serial (DCLK + DATA0) and JTAG ISP | Serial (x1) to FPGA via DCLK/nCONFIG/nSTATUS/CONF_DONE |
| Package Type | PLCC-32 (JC) | — |
| Pin-Anzahl | 32 | — |
| Montageart | Surface Mount / Socket | Surface Mount |
| Betriebstemperatur | 0 C to +70 C | -40C to +85C (industrial) [DATA_NEEDED: exact grade from datasheet] |
| Programmability | IEEE 1532 JTAG In-System Programmable | — |
| Compatibility | FLEX, APEX, ACEX, Cyclone, Stratix FPGAs | — |
| Lead-Free / RoHS | [DATA_NEEDED: lead-free / RoHS status] | — |
| AEC-Q100 Qualification | Not Qualified | — |
| Configuration Control Pins | nSTATUS, nCONFIG, CONF_DONE | — |
| Speichertyp | — | Non-volatile configuration PROM |
| Speichergröße | — | 1.6 Mbit |
| Programming Interface | — | IEEE 1149.1 (JTAG) ISP, 5.0-V and 3.3-V tolerant |
| Supply Voltage VCC | — | 3.0 V to 3.6 V (3.3-V operation) |
| ISP Voltage Range | — | 5.0 V or 3.3 V |
| Supported FPGA Families | — | ACEX 1K, APEX 20K/20KC/20KE, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, MAX 9000 |
| Cascade Support | — | Yes - daisy-chain multiple EPC2 devices via JTAG for larger bitstreams |
| Gehäuse | — | 20-pin PLCC (J-lead, 9x9 mm) |
| RoHS-Status | — | Non-Compliant (original Altera Pb-containing part) |
| Lead-Free Version | — | EPC2LC20N available as lead-free equivalent |
| Programming Support | — | Altera Programming Unit (APU), Quartus II, JTAG programmer |
| Boundary-Scan | — | IEEE 1149.1 compliant, 8-bit or 16-bit JTAG |