EPC448JC-30A vs EPC2LC20 对比

详细并排对比 EPC448JC-30A 出自 Altera 和 EPC2LC20 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPC448JC-30A EPC2LC20
品牌 Altera Altera
分类 FPGA & CPLD Memory ICs
生命周期状态 不推荐新设计 不推荐新设计
库存状态 有库存 有库存
单价(USD) $9.10 $7.20
Memory Density 4 Mbit —
Device Family Enhanced Configuration Device —
Supply Voltage (VCC) 3.3 V nominal —
Operating Voltage Range 3.0 V to 3.6 V —
Access Time 30 ns —
Configuration Interface Altera serial (DCLK + DATA0) and JTAG ISP Serial (x1) to FPGA via DCLK/nCONFIG/nSTATUS/CONF_DONE
Package Type PLCC-32 (JC) —
引脚数量 32 —
安装类型 Surface Mount / Socket Surface Mount
工作温度 0 C to +70 C -40C to +85C (industrial) [DATA_NEEDED: exact grade from datasheet]
Programmability IEEE 1532 JTAG In-System Programmable —
Compatibility FLEX, APEX, ACEX, Cyclone, Stratix FPGAs —
Lead-Free / RoHS [DATA_NEEDED: lead-free / RoHS status] —
AEC-Q100 Qualification Not Qualified —
Configuration Control Pins nSTATUS, nCONFIG, CONF_DONE —
存储器类型 — Non-volatile configuration PROM
存储容量 — 1.6 Mbit
Programming Interface — IEEE 1149.1 (JTAG) ISP, 5.0-V and 3.3-V tolerant
Supply Voltage VCC — 3.0 V to 3.6 V (3.3-V operation)
ISP Voltage Range — 5.0 V or 3.3 V
Supported FPGA Families — ACEX 1K, APEX 20K/20KC/20KE, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, MAX 9000
Cascade Support — Yes - daisy-chain multiple EPC2 devices via JTAG for larger bitstreams
封装 — 20-pin PLCC (J-lead, 9x9 mm)
RoHS 状态 — Non-Compliant (original Altera Pb-containing part)
Lead-Free Version — EPC2LC20N available as lead-free equivalent
Programming Support — Altera Programming Unit (APU), Quartus II, JTAG programmer
Boundary-Scan — IEEE 1149.1 compliant, 8-bit or 16-bit JTAG

数据手册与资源

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