EPC4QC100N vs EPC4QC1C00N Vergleich

Detaillierter Direktvergleich von EPC4QC100N von Intel und EPC4QC1C00N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EPC4QC100N EPC4QC1C00N
Marke Intel Altera
Kategorie Memory ICs FPGA & CPLD
Lebenszyklusstatus NRND Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $8,10 $9,10
Speichertyp Flash (NOR, configuration PROM) —
Speichergröße 4 Mbit (4,194,304 bits) —
Programmable Type In System Programmable (ISP) —
Configuration Interface Serial / Parallel / JTAG (IEEE 1149.1) —
Maximum DCLK Frequency 66.7 MHz —
On-Chip Decompression Yes —
Supply Voltage (VCC) 3.0 V to 3.6 V 3.0 V to 3.6 V (3.3 V typical)
Typical Supply Voltage 3.3 V —
Betriebstemperatur 0 C to 70 C (commercial) -40 C to +85 C (industrial)
Gehäuse 100-pin PQFP (Plastic Quad Flat Pack) 100-pin PQFP (QFP-100)
Package Dimensions 20 x 14 mm —
Pin Pitch 0.65 mm —
Montageart Surface Mount —
Packaging Tray —
Lead Free / RoHS Yes (per chipdig datasheet excerpt) —
Family EPC4 Enhanced Configuration Device —
JTAG Support Yes (IEEE 1149.1 boundary-scan) —
Device Family — Enhanced Configuration Device (EPC4)
Memory Density — 4 Mbit (4,194,304 bits)
I/O Voltage Tolerance — 3.3 V / 5 V tolerant
Interface to FPGA — Serial DATA, DCLK, nCONFIG, nSTATUS, CONF_DONE
Configuration Data Width — 4-bit multiplexed on single DATA pin
In-System Programming — JTAG (IEEE 1149.1)
Programming Voltage — On-chip generated, no external VPP
Page Mode — Yes, multi-page storage supported
Target FPGA Families — Stratix, Cyclone, APEX, Mercury, ACEX
Configuration Clock (DCLK) — [DATA_NEEDED: DCLK max frequency]
MSL-Level — 3 (per JEDEC J-STD-020)
RoHS-Status — [DATA_NEEDED: RoHS compliance status]
Lead-Free — [DATA_NEEDED: lead-free status]

Datenblätter & Ressourcen

Alle Produkte durchsuchen BOM erstellen Angebot anfordern