EPF10K100EQC208-1 vs EPF10K100BQC208-2 Vergleich
Detaillierter Direktvergleich von EPF10K100EQC208-1 von Altera und EPF10K100BQC208-2 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPF10K100EQC208-1 | EPF10K100BQC208-2 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $220,00 | $82,00 |
| Series | FLEX 10KE | FLEX-10K |
| Logic Elements | 4,992 | — |
| Typical Gates | 100,000 | — |
| Total RAM Bits | 49,152 | 24,576 (6,144 user bits cited) |
| Number of LABs/CLBs | 624 | — |
| Number of I/O | 147 | — |
| Gehäuse | 208-BFQFP (PQFP 28x28 mm) | 208-BFQFP / PQFP (28 x 28 mm) |
| Package Pin Count | 208 | — |
| Core Supply Voltage | 2.375 V to 2.625 V (2.5 V nominal) | — |
| I/O Supply Voltage | 3.3 V (multi-voltage I/O) | — |
| Betriebstemperatur | 0 C to 70 C (commercial) | 0C to +70C (Commercial) |
| Montageart | Surface Mount | Surface Mount |
| Logic Family | CMOS (SRAM-based) | — |
| Propagation Delay | 0.6 ns | — |
| Configuration | SRAM (volatile, in-system programmable) | — |
| JTAG Support | Yes (IEEE 1149.1 boundary scan) | — |
| RoHS-Status | [DATA_NEEDED: RoHS compliance per Altera product label] | Unknown (legacy part, pre-RoHS transition for many PQFP variants) |
| Manufacturer | — | Altera (Intel) |
| Logic Elements / Cells | — | 4,992 |
| Number of EABs | — | 12 |
| Number of Gates (typical) | — | 100,000 |
| Supply Voltage (Vcc) | — | 4.75 V to 5.25 V |
| Speed Grade | — | -2 |
| Process Technology | — | 0.42 µm CMOS SRAM |
| User I/O Pins | — | 148 (approx.) |
| Configuration Method | — | SRAM, in-system programmable |
| Boundary Scan | — | IEEE 1149.1 (JTAG) compliant |
| Lead-Free | — | Unknown |