EPF10K200SBC600-2 vs EPF10K100EBC356-2 Vergleich
Detaillierter Direktvergleich von EPF10K200SBC600-2 von Altera und EPF10K100EBC356-2 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EPF10K100EBC356-2 - 100K Gates FLEX 10KE FPGA 274 I/O BGA-356 | Intel
EPF10K100EBC356-2 ObsoleteSpezifikationsvergleich
| Parameter | EPF10K200SBC600-2 | EPF10K100EBC356-2 |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $85,00 | $59,95 |
| Manufacturer | Altera (now Intel) | — |
| Series | FLEX-10KS | FLEX-10KE |
| Logic Elements / Cells | 9,984 | — |
| Logic Array Blocks (LABs) | 1,248 | — |
| Typical Gates | 200,000 | 100,000 |
| User I/Os | 470 | — |
| Propagation Delay | 0.4 ns | — |
| Voltage - Supply (VCCINT) | 2.375 V to 2.625 V | — |
| Betriebstemperatur | 0 C to 70 C | 0 C to 70 C (Commercial) |
| Montageart | Surface Mount | Surface Mount |
| Gehäuse / Bauform | 600-BGA (45 x 45 mm, 1.27 mm pitch) | — |
| Supplier Device Package | 600-BGA | — |
| Logic Family | CMOS (SRAM-based) | — |
| Process Technology | 0.22 micrometer | CMOS, SRAM-based |
| Embedded Array Blocks (EABs) | Yes (for distributed RAM/ROM) | 12 |
| PLLs | 4 | — |
| Configuration Interface | IEEE 1149.1 JTAG | — |
| MultiVolt I/O | Yes (1.5 V, 1.8 V, 2.5 V, 3.3 V, 5 V) | — |
| Packaging | Bulk / Tray | — |
| RoHS-Status | Non-compliant | [DATA_NEEDED: RoHS compliance] |
| Family | — | Embedded Programmable Logic Device (PLD) |
| Maximum System Gates | — | 158,000 |
| Logic Elements (LEs) | — | 4,992 |
| Number of LABs/CLBs | — | 624 |
| Total RAM Bits | — | 49,152 |
| User I/O Pins | — | 274 |
| Supply Voltage (Core) | — | 2.375 V to 2.625 V (2.5 V nominal) |
| Propagation Delay (tPD) | — | 0.5 ns |
| Internal Operating Frequency | — | up to 250 MHz |
| Package Type | — | 356-LBGA (35 x 35 mm, 1.27 mm pitch) |
| Configuration Method | — | SRAM, JTAG (IEEE 1149.1) |
| Speed Grade | — | -2 |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |