EPF10K30RI240-4 vs EPF10K30RI240-4N Vergleich
Detaillierter Direktvergleich von EPF10K30RI240-4 von Intel und EPF10K30RI240-4N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EPF10K30RI240-4 - FLEX 10K FPGA 30K Gates 1728 Cells 240-RQFP | Intel
EPF10K30RI240-4 Obsolete
Spezifikationsvergleich
| Parameter | EPF10K30RI240-4 | EPF10K30RI240-4N |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $19,95 | $52,40 |
| Family | FLEX 10K | FLEX 10K |
| Typical Gates | 30,000 | — |
| Logic Elements / Cells | 1,728 | 1,728 |
| Logic Array Blocks (LABs) | 216 | — |
| Embedded Memory (EAB) | 12 kbit | — |
| User I/Os | 189 | — |
| Propagation Delay | 0.6 ns | — |
| Internal Frequency (max) | 125 MHz | — |
| Process Technology | 0.42 µm CMOS SRAM | 0.42 µm CMOS SRAM |
| Supply Voltage VCCINT | 5 V | — |
| MultiVolt I/O (VCCIO) | 3.3 V / 5 V | — |
| Gehäuse | 240-pin RQFP (Power QFP) with exposed pad | — |
| Montageart | Surface Mount | Surface Mount |
| Betriebstemperatur | 0 °C to +70 °C (commercial) | 0 °C to +70 °C |
| Configuration Mode | Serial / Parallel EPROM, JTAG | — |
| RoHS-Status | Non-compliant (legacy 5 V device) | [DATA_NEEDED: rohs status] |
| Lead-Free | No (SnPb finish on legacy parts) | — |
| Series | — | FLEX-10K® |
| Total RAM Bits | — | 12,288 |
| Number of LABs/CLBs | — | 216 |
| Number of Logic Elements per LAB | — | 8 |
| Typical Gate Count | — | 30,000 gates |
| User I/O Count | — | 189 |
| Voltage - Supply (VCCINT) | — | 5 V |
| Voltage - I/O (VCCIO) | — | 3.3 V or 5 V (MultiVolt) |
| Speed Grade | — | -4 |
| Maximum Internal Frequency | — | 125 MHz (typical, design-dependent) |
| Gehäuse / Bauform | — | 240-BFQFP Exposed Pad (RQFP-240) |
| Configuration Method | — | SRAM - serial via BitBlaster / ByteBlasterMV / Jam STAPL |
| JTAG (IEEE 1149.1) | — | Yes |
| PCI Clamping / Slew-Rate Control | — | Yes (per-pin, via Altera logic options) |
| Lead-Free / Halogen-Free | — | [DATA_NEEDED: lead-free / halogen-free] |