EPF10K50ETC144-3 vs EPF10K50STC144-3 Vergleich
Detaillierter Direktvergleich von EPF10K50ETC144-3 von Intel und EPF10K50STC144-3 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPF10K50ETC144-3 | EPF10K50STC144-3 |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $29,90 | $20,80 |
| Family | FLEX 10KE | FLEX 10K |
| Typical Gate Count | 50,000 gates | — |
| Logic Elements / Cells | 2,880 | 2,880 |
| Total Memory Bits | 40,960 bits | — |
| Logic Array Blocks (LABs) | 360 | 360 |
| User I/O Pins (this package) | 102 | — |
| Max User I/O (family) | 274 pins | — |
| Anzahl der Pins | 144 | — |
| Package Type | TQFP-144 (also referred to as 144-LQFP) | — |
| Propagation Delay | 0.6 ns | 0.6 ns (typical) |
| Maximum Internal Frequency | 166.67 MHz | — |
| Internal Frequency (per DigChip summary) | 66.67 MHz | — |
| Process Technology | 0.22 µm CMOS | 0.22 um CMOS, SRAM-based |
| Core Supply Voltage | 2.5 V | — |
| Logic Family | CMOS | — |
| Betriebstemperatur | 0 °C to +70 °C (Commercial) | 0 C to 70 C (commercial) |
| Montageart | Surface Mount | Surface Mount (Gull-wing leads) |
| Configuration Memory | SRAM (volatile) | — |
| JTAG Support | IEEE 1149.1 boundary scan | — |
| RoHS-Status | [DATA_NEEDED: rohs status] | [DATA_NEEDED: RoHS status] |
| Series | — | FLEX 10KS |
| Typical Gates | — | 50,000 |
| On-chip RAM Bits | — | 40,960 |
| Maximum User I/Os | — | 102 |
| Number of I/O Banks | — | [DATA_NEEDED: number of I/O banks] |
| Internal Operating Frequency | — | 166.67 MHz |
| Speed Grade | — | -3 |
| Core Voltage | — | 2.5 V |
| I/O Voltage | — | 5.0 V (3.3 V LVTTL/LVCMOS compatible) |
| Gehäuse | — | 144-LQFP (also called LFQFP / TQFP) |
| Configuration | — | SRAM (volatile, requires external EPC) |
| JTAG Boundary Scan | — | Built-in, IEEE Std. 1149.1-1990 compliant |