EPF10K50ETC144-3 vs EPF10K50STC144-3 Comparaison
Comparaison détaillée côte à côte de EPF10K50ETC144-3 par Intel et EPF10K50STC144-3 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPF10K50ETC144-3 | EPF10K50STC144-3 |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $29,90 | $20,80 |
| Family | FLEX 10KE | FLEX 10K |
| Typical Gate Count | 50,000 gates | — |
| Logic Elements / Cells | 2,880 | 2,880 |
| Total Memory Bits | 40,960 bits | — |
| Logic Array Blocks (LABs) | 360 | 360 |
| User I/O Pins (this package) | 102 | — |
| Max User I/O (family) | 274 pins | — |
| Nombre de broches | 144 | — |
| Package Type | TQFP-144 (also referred to as 144-LQFP) | — |
| Propagation Delay | 0.6 ns | 0.6 ns (typical) |
| Maximum Internal Frequency | 166.67 MHz | — |
| Internal Frequency (per DigChip summary) | 66.67 MHz | — |
| Process Technology | 0.22 µm CMOS | 0.22 um CMOS, SRAM-based |
| Core Supply Voltage | 2.5 V | — |
| Logic Family | CMOS | — |
| Température de fonctionnement | 0 °C to +70 °C (Commercial) | 0 C to 70 C (commercial) |
| Type de montage | Surface Mount | Surface Mount (Gull-wing leads) |
| Configuration Memory | SRAM (volatile) | — |
| JTAG Support | IEEE 1149.1 boundary scan | — |
| Statut RoHS | [DATA_NEEDED: rohs status] | [DATA_NEEDED: RoHS status] |
| Series | — | FLEX 10KS |
| Typical Gates | — | 50,000 |
| On-chip RAM Bits | — | 40,960 |
| Maximum User I/Os | — | 102 |
| Number of I/O Banks | — | [DATA_NEEDED: number of I/O banks] |
| Internal Operating Frequency | — | 166.67 MHz |
| Speed Grade | — | -3 |
| Core Voltage | — | 2.5 V |
| I/O Voltage | — | 5.0 V (3.3 V LVTTL/LVCMOS compatible) |
| Boîtier | — | 144-LQFP (also called LFQFP / TQFP) |
| Configuration | — | SRAM (volatile, requires external EPC) |
| JTAG Boundary Scan | — | Built-in, IEEE Std. 1149.1-1990 compliant |