EPF10K50STC144-3 vs EPF10K30ETI144-3 Vergleich
Detaillierter Direktvergleich von EPF10K50STC144-3 von Altera und EPF10K30ETI144-3 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPF10K50STC144-3 | EPF10K30ETI144-3 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $20,80 | $29,80 |
| Series | FLEX 10KS | FLEX-10KE |
| Family | FLEX 10K | FLEX-10KE Embedded Programmable Logic Device |
| Typical Gates | 50,000 | — |
| Logic Elements / Cells | 2,880 | — |
| Logic Array Blocks (LABs) | 360 | 216 |
| On-chip RAM Bits | 40,960 | — |
| Maximum User I/Os | 102 | — |
| Number of I/O Banks | [DATA_NEEDED: number of I/O banks] | — |
| Internal Operating Frequency | 166.67 MHz | — |
| Propagation Delay | 0.6 ns (typical) | — |
| Speed Grade | -3 | — |
| Core Voltage | 2.5 V | — |
| I/O Voltage | 5.0 V (3.3 V LVTTL/LVCMOS compatible) | — |
| Process Technology | 0.22 um CMOS, SRAM-based | — |
| Gehäuse | 144-LQFP (also called LFQFP / TQFP) | 144-LQFP (LFQFP) |
| Betriebstemperatur | 0 C to 70 C (commercial) | -40C to +85C (Industrial) |
| Montageart | Surface Mount (Gull-wing leads) | Surface Mount (Gull Wing) |
| Configuration | SRAM (volatile, requires external EPC) | — |
| JTAG Boundary Scan | Built-in, IEEE Std. 1149.1-1990 compliant | — |
| RoHS-Status | [DATA_NEEDED: RoHS status] | Non-Compliant (Sn/Pb lead finish) |
| Logic Elements | — | 1728 |
| Embedded RAM | — | 24,576 bits |
| Embedded Array Blocks (EABs) | — | 6 |
| Maximum User I/O | — | 102 |
| Maximum Equivalent Gates | — | 119,000 |
| Pin-to-Pin Delay (Speed Grade) | — | 12.5 ns |
| Supply Voltage (Core) | — | 2.5 V / 3.3 V |
| I/O Voltage Tolerance | — | 5.0 V / 3.3 V / 2.5 V (multi-volt) |
| Package Height | — | 1.6 mm |
| Lead Finish | — | Tin/Lead (Sn/Pb) |
| Configuration Method | — | SRAM (volatile) + JTAG IEEE 1149.1 |