EPF81500AQC240-2 vs EPF81500AQC240-4 Vergleich

Detaillierter Direktvergleich von EPF81500AQC240-2 von Altera und EPF81500AQC240-4 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EPF81500AQC240-2 EPF81500AQC240-4
Marke Altera Altera
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $61,40 $18,25
Family FLEX 8000 FLEX 8000
Logic Elements 1296 —
Number of Logic Array Blocks (LABs) 162 —
Number of I/Os 181 —
Versorgungsspannung 4.75 V to 5.25 V —
Speed Grade -2 -4
Gehäuse 240-BFQFP (240-pin Fine-pitch QFP, 32x32 mm) 240-BFQFP (Plastic Quad Flat Pack)
Montageart Surface Mount (gull-wing leads) —
Configuration Memory SRAM (volatile, requires configuration download on power-up) —
Configuration Mode Serial (BitBlaster) or parallel JTAG —
Operating Temperature (Commercial) 0 C to +70 C —
Process Technology CMOS SRAM, 5 V tolerant I/O 0.42 µm CMOS SRAM
JTAG Support IEEE 1149.1 boundary-scan —
RoHS-Status [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: RoHS compliance]
Lead-Free [DATA_NEEDED: lead-free terminal finish] [DATA_NEEDED: lead-free status]
MSL-Level [DATA_NEEDED: MSL moisture sensitivity level] —
Usable Gates — 16,000
Logic Elements / Cells — 1,296
User I/O Pins — 181
Supply Voltage (Core) — 5 V
I/O Voltage (MultiVolt) — 3.3 V or 5.0 V selectable
Logic Family — CMOS
Propagation Delay (typical) — 1.7 ns
LE-to-LE Delay (tpd) — 4.9 ns (16-bit decode path)
Maximum Frequency — 125 MHz
Configuration Method — SRAM, serial or parallel
Configuration Devices — EPC1, EPC1064, EPC1213, EPC1441
Betriebstemperatur — 0 °C to +70 °C (commercial)

Datenblätter & Ressourcen

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