EPF81500AQC240-2 vs EPF81500AQC240-4 比較
詳細な並列比較: EPF81500AQC240-2 メーカー: Altera および EPF81500AQC240-4 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPF81500AQC240-2 | EPF81500AQC240-4 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $61.40 | $18.25 |
| Family | FLEX 8000 | FLEX 8000 |
| Logic Elements | 1296 | — |
| Number of Logic Array Blocks (LABs) | 162 | — |
| Number of I/Os | 181 | — |
| 電源電圧 | 4.75 V to 5.25 V | — |
| Speed Grade | -2 | -4 |
| パッケージ | 240-BFQFP (240-pin Fine-pitch QFP, 32x32 mm) | 240-BFQFP (Plastic Quad Flat Pack) |
| 実装タイプ | Surface Mount (gull-wing leads) | — |
| Configuration Memory | SRAM (volatile, requires configuration download on power-up) | — |
| Configuration Mode | Serial (BitBlaster) or parallel JTAG | — |
| Operating Temperature (Commercial) | 0 C to +70 C | — |
| Process Technology | CMOS SRAM, 5 V tolerant I/O | 0.42 µm CMOS SRAM |
| JTAG Support | IEEE 1149.1 boundary-scan | — |
| RoHS ステータス | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS compliance] |
| Lead-Free | [DATA_NEEDED: lead-free terminal finish] | [DATA_NEEDED: lead-free status] |
| MSLレベル | [DATA_NEEDED: MSL moisture sensitivity level] | — |
| Usable Gates | — | 16,000 |
| Logic Elements / Cells | — | 1,296 |
| User I/O Pins | — | 181 |
| Supply Voltage (Core) | — | 5 V |
| I/O Voltage (MultiVolt) | — | 3.3 V or 5.0 V selectable |
| Logic Family | — | CMOS |
| Propagation Delay (typical) | — | 1.7 ns |
| LE-to-LE Delay (tpd) | — | 4.9 ns (16-bit decode path) |
| Maximum Frequency | — | 125 MHz |
| Configuration Method | — | SRAM, serial or parallel |
| Configuration Devices | — | EPC1, EPC1064, EPC1213, EPC1441 |
| 動作温度 | — | 0 °C to +70 °C (commercial) |