EPM2210F256C4 vs EPM2210F256C3N Vergleich
Detaillierter Direktvergleich von EPM2210F256C4 von Altera und EPM2210F256C3N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM2210F256C4 | EPM2210F256C3N |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $42,80 | $47,10 |
| Series | MAX II | MAX II |
| Logic Elements | 2,210 | — |
| Equivalent Macrocells | 1,700 | — |
| User Flash Memory (UFM) | 8 Kbits | — |
| User I/O Pins | 212 | — |
| Gehäuse | 256-ball FineLine BGA (FBGA) | 256-ball FineLine BGA (FBGA), 17 x 17 mm, 1.0 mm pitch |
| Process Technology | 0.18 µm 6-layer-metal flash | 0.18 um flash CMOS |
| Core Supply Voltage | 1.8 V | — |
| I/O Supply Voltage (MultiVolt) | 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| Pin-to-pin Delay (tPD1) | 7 ns | — |
| Maximum Frequency (fMAX) | 201 MHz | — |
| Betriebstemperatur | 0 °C to +85 °C (commercial extended) | — |
| Programming Interface | JTAG (IEEE 1149.1) ISP | — |
| Montageart | Surface Mount | Surface Mount |
| RoHS-Status | Compliant | Compliant (per DigiKey product page) |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Programmable Type | — | In System Programmable (JTAG, IEEE 1149.1) |
| Macrocells | — | 1700 |
| Logic Elements / Blocks | — | 2210 |
| Number of User I/Os | — | 204 |
| Maximum Propagation Delay (tPD) | — | 7 ns |
| Maximum Internal Frequency (fMAX) | — | 304 MHz |
| Internal Supply Voltage | — | 2.5 V / 3.3 V (on-chip regulator allows single 3.3 V rail) |
| I/O Standard Support | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V LVCMOS (MultiVolt) |
| User Flash Memory | — | 8 Kbits |
| Configuration Memory | — | On-chip flash (non-volatile, instant-on) |
| Betriebs-Sperrschichttemperatur | — | 0 C to 85 C (commercial, TJ suffix 'C') |
| MSL-Level | — | 3 (per JEDEC J-STD-020, typical for FBGA) |