EPM240F100C5N vs EPM240GT100C3 Vergleich
Detaillierter Direktvergleich von EPM240F100C5N von Intel und EPM240GT100C3 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM240F100C5N | EPM240GT100C3 |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $5,20 | $9,95 |
| Device Family | MAX II | — |
| Logic Elements (LEs) | 240 | — |
| Macrocells | 192 | — |
| User I/O Pins (maximum) | 80 | — |
| Pin-to-Pin Logic Delay (tPD) | 4.7 ns | — |
| Maximum Operating Frequency | [DATA_NEEDED: fmax per datasheet] | — |
| Global Clock Networks | [DATA_NEEDED: count] | — |
| Gehäuse | 100-ball FineLine BGA (FBGA-100) | TQFP-100 (100-TQFP, 16 × 16 mm, 0.5 mm pitch) |
| Betriebstemperaturbereich | 0C to +85C (commercial) | — |
| Supply Voltage Core (VCCINT) | 3.3 V | — |
| I/O Bank Voltage (VCCIO) | 1.5V / 1.8V / 2.5V / 3.3V (MultiVolt) | — |
| Configuration Memory | Non-volatile flash (instant-on) | — |
| JTAG Support | IEEE 1149.1 boundary-scan | — |
| Programming Interface | JTAG / ByteBlasterMV | IEEE 1149.1 JTAG (ISP) |
| Montageart | Surface Mount (BGA) | Surface Mount |
| RoHS-Status | Compliant | — |
| Family | — | MAX II |
| Logic Elements (LE) | — | 240 |
| Equivalent Macro Cells | — | 192 |
| Pin-to-Pin Delay (tPD) | — | 4.7 ns |
| Maximum Internal Frequency (fMAX) | — | 304 MHz |
| User I/O Count | — | 80 |
| User Flash Memory (UFM) | — | 8 Kbit |
| Process Technology | — | 0.18 µm 6-layer-metal flash |
| Core Supply Voltage | — | 1.8 V (internal) |
| I/O Bank Voltages (MultiVolt) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| Betriebstemperatur | — | 0 °C to 85 °C (commercial, C3 suffix) |
| MSL-Level | — | 3 (168 hours) |