EPM240T100C4 vs EPM240T100A5N Vergleich
Detaillierter Direktvergleich von EPM240T100C4 von Intel und EPM240T100A5N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM240T100C4 | EPM240T100A5N |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $8,20 | $7,05 |
| Series | MAX II | — |
| Programmable Type | In System Programmable | — |
| Number of Macrocells | 192 | — |
| Number of Logic Elements/Blocks | 240 | — |
| Number of User I/O | 80 | — |
| Maximum Propagation Delay (tPD) | 4.7 ns | — |
| Internal Supply Voltage | 2.5 V / 3.3 V | — |
| I/O Bank Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) | — |
| Process Technology | 0.18 µm CMOS, non-volatile Flash | 0.18 µm |
| User Flash Memory | 8 Kbits (typical) | — |
| Gehäuse / Bauform | 100-pin TQFP | — |
| Montageart | Surface Mount | Surface Mount |
| Betriebstemperatur | 0 °C to +85 °C (TJ, commercial) | 0C to +85C (commercial, "A5N" suffix) |
| Programming Interface | JTAG (IEEE 1149.1) - ISP | JTAG (IEEE 1149.1) / ISP |
| Supplier Device Package | 100-TQFP (16 × 16 mm, 0.5 mm pitch) | — |
| RoHS-Status | [DATA_NEEDED: RoHS status] | Compliant (Pb-free) |
| MSL-Level | [DATA_NEEDED: MSL level] | — |
| Family | — | MAX II |
| Macro Cells | — | 192 |
| Logic Elements (LE) | — | 240 |
| User I/O Count | — | 80 |
| Pin-to-Pin Logic Delay (tPD) | — | 4.7 ns |
| Maximum Internal Frequency | — | 201.1 MHz |
| Versorgungsspannung | — | 2.5 V / 3.3 V |
| I/O Bank Count | — | 4 (multi-voltage) |
| Configuration Memory | — | On-chip Flash (instant-on) |
| Gehäuse | — | 100-pin TQFP (14 x 14 x 1.0 mm) |