EPM240T100C4N vs EPM240GT100C5N Vergleich
Detaillierter Direktvergleich von EPM240T100C4N von Altera und EPM240GT100C5N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM240T100C4N | EPM240GT100C5N |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $6,10 | $9,20 |
| Family | MAX II | MAX II |
| Device | EPM240 | — |
| Macro Cells | 192 | — |
| Logic Elements | 240 | — |
| Propagation Delay (tPD) | 4.7 ns (max) | — |
| Maximum Frequency | 247.5 MHz | — |
| User I/O | 80 | — |
| Supply Voltage - Internal | 2.5 V / 3.3 V | — |
| I/O Voltage (MultiVolt) | 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| Process Technology | 0.18 µm | — |
| Programmable Type | In-System Programmable (Flash) | In-System Programmable (ISP) via JTAG |
| Gehäuse / Bauform | 100-TQFP | — |
| Montageart | Surface Mount | Surface Mount |
| Betriebstemperatur | 0 °C to +85 °C (commercial, 'C' suffix) | 0C to +85C (Commercial) |
| JTAG Support | IEEE 1149.1 boundary-scan | — |
| RoHS-Status | Compliant (lead-free, 'N' suffix) | Compliant |
| Series | — | EPM240 |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Elements (LEs) | — | 240 |
| Macrocells | — | 192 |
| User I/Os | — | 80 |
| Pin-to-Pin Delay (tPD) | — | 4.7 ns |
| User Flash Memory (UFM) | — | 8 Kbits |
| Core Supply Voltage (VCCINT) | — | 2.5 V or 3.3 V |
| I/O Supply Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| Gehäuse | — | 100-pin TQFP (T100) |
| Configuration Memory | — | Non-volatile Flash (instant-on) |
| MSL-Level | — | 3 |