EPM240ZM100C7N vs EPM240ZM68C6N Vergleich
Detaillierter Direktvergleich von EPM240ZM100C7N von Altera und EPM240ZM68C6N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM240ZM100C7N | EPM240ZM68C6N |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $6,10 | $5,10 |
| Family | MAX II Z | MAX II Z (CPLD) |
| Series | MAX II | — |
| Logic Elements | 240 | — |
| Macrocells | 192 | 192 |
| Pin-to-Pin Logic Delay (tPD) | 7.5 ns | — |
| User I/Os | 80 | — |
| User Flash Memory (UFM) | 8 Kbits | — |
| Core Supply Voltage (VCCINT) | 1.8 V | 1.8 V |
| I/O Supply Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (banked) |
| Gehäuse | 100-MBGA (Micro FineLine BGA), 6 x 6 mm | 68-ball Micro FBGA (MBGA-68) |
| Configuration Memory | On-chip non-volatile flash | On-chip flash (non-volatile, instant-on) |
| Process Technology | 0.18 µm 6-layer-metal flash | 0.18 µm |
| JTAG Support | IEEE 1149.1 (programming + boundary-scan) | — |
| Betriebstemperatur | 0 °C to +85 °C (commercial) | — |
| Montageart | Surface Mount (BGA) | Surface Mount (BGA) |
| Lead-Free / RoHS | Compliant per datasheet | — |
| Logic Elements (LE) | — | 240 |
| Maximum Propagation Delay (tPD) | — | 7.5 ns |
| Internal Performance (fMAX) | — | 184.1 MHz |
| User I/O Count | — | 80 |
| Number of I/O Banks | — | 4 |
| Programming Interface | — | JTAG (IEEE 1149.1 / IEEE 1532) |
| Betriebstemperaturbereich | — | -40°C to +85°C (commercial, 'C' suffix) |
| RoHS-Status | — | Compliant |
| Lead-Free Finish | — | Yes |
| MSL-Level | — | 3 (per JEDEC J-STD-020) |