EPM240ZM100C7N vs EPM240ZM68C6N 对比

详细并排对比 EPM240ZM100C7N 出自 Altera 和 EPM240ZM68C6N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM240ZM100C7N EPM240ZM68C6N
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 有效 有效
库存状态 有库存 有库存
单价(USD) $6.10 $5.10
Family MAX II Z MAX II Z (CPLD)
Series MAX II —
Logic Elements 240 —
Macrocells 192 192
Pin-to-Pin Logic Delay (tPD) 7.5 ns —
User I/Os 80 —
User Flash Memory (UFM) 8 Kbits —
Core Supply Voltage (VCCINT) 1.8 V 1.8 V
I/O Supply Voltage (VCCIO) 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) 1.5 V / 1.8 V / 2.5 V / 3.3 V (banked)
封装 100-MBGA (Micro FineLine BGA), 6 x 6 mm 68-ball Micro FBGA (MBGA-68)
Configuration Memory On-chip non-volatile flash On-chip flash (non-volatile, instant-on)
Process Technology 0.18 µm 6-layer-metal flash 0.18 µm
JTAG Support IEEE 1149.1 (programming + boundary-scan) —
工作温度 0 °C to +85 °C (commercial) —
安装类型 Surface Mount (BGA) Surface Mount (BGA)
Lead-Free / RoHS Compliant per datasheet —
Logic Elements (LE) — 240
Maximum Propagation Delay (tPD) — 7.5 ns
Internal Performance (fMAX) — 184.1 MHz
User I/O Count — 80
Number of I/O Banks — 4
Programming Interface — JTAG (IEEE 1149.1 / IEEE 1532)
工作温度范围 — -40°C to +85°C (commercial, 'C' suffix)
RoHS 状态 — Compliant
Lead-Free Finish — Yes
MSL 等级 — 3 (per JEDEC J-STD-020)

数据手册与资源

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