EPM3128ATC144-7 vs EPM3128ATC144-10 Vergleich
Detaillierter Direktvergleich von EPM3128ATC144-7 von Intel und EPM3128ATC144-10 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM3128ATC144-7 | EPM3128ATC144-10 |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $8,10 | $6,20 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 128 | — |
| Usable Gates | 2,500 | 2,500 (typical) |
| Logic Array Blocks (LABs) | 8 (16 macrocells each) | — |
| User I/Os | 96 | 96 |
| Gehäuse | TQFP-144 (22x22 mm) | 144-pin TQFP (TQ144) |
| Supply Voltage (VCCINT) | 3.3 V | 3.3 V |
| I/O Voltage (VCCIO) | 1.8 V / 2.5 V / 3.3 V (multiVolt) | — |
| Speed Grade | -7 | — |
| Pin-to-Pin Propagation Delay (tPD) | 7.5 ns | — |
| Maximum Internal Frequency (fCNT) | 129.9 MHz | — |
| Programming Technology | CMOS EEPROM (in-system programmable) | — |
| JTAG Support | IEEE 1149.1 boundary-scan + ISP | — |
| Betriebstemperatur | 0C to +70C (Commercial) | 0C to +70C (commercial) |
| Montageart | Surface Mount | Surface Mount |
| Process Technology | CMOS EEPROM | — |
| Macro Cells | — | 128 |
| Logic Elements / LABs | — | 4 Logic Array Blocks |
| Propagation Delay (tPD) | — | 10 ns (speed grade -10) |
| Counter Frequency (fCNT) | — | Up to 227.3 MHz |
| MultiVolt I/O Interface | — | 1.5V / 1.8V / 2.5V / 3.3V |
| In-System Programmability | — | IEEE Std. 1532 compliant |
| Boundary-Scan Test | — | IEEE Std. 1149.1 (JTAG) |
| Configuration Memory | — | EEPROM (non-volatile, instant-on) |
| RoHS-Status | — | Compliant |
| Lead-Free | — | Yes |