EPM3128ATI100-5N vs EPM3128ATI10010N Vergleich
Detaillierter Direktvergleich von EPM3128ATI100-5N von Intel und EPM3128ATI10010N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EPM3128ATI100-5N - MAX 3000A CPLD, 128 Macrocells, TQFP-100 | Intel / Altera
EPM3128ATI100-5N ✓ AktivSpezifikationsvergleich
| Parameter | EPM3128ATI100-5N | EPM3128ATI10010N |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $11,45 | $9,10 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 128 | — |
| Logic Array Blocks (LABs) | 8 (16 macrocells per LAB) | 8 |
| User I/O Pins | 80 | — |
| Pin-to-Pin Delay (tPD) | 5.0 ns | — |
| Supply Voltage (VCCINT) | 3.3 V | — |
| I/O Standard | 3.3 V LVCMOS / LVTTL, 5.0 V tolerant inputs | — |
| Programming Method | In-System Programmable via IEEE Std. 1532 (JTAG) | — |
| Betriebstemperatur | -40C to +85C (Industrial) | 0 C to +70 C (commercial) |
| Gehäuse | 100-pin TQFP | 100-pin TQFP |
| Montageart | Surface Mount | Surface Mount |
| Configuration Memory | Non-volatile EEPROM | — |
| JTAG Support | IEEE 1149.1 boundary scan | — |
| RoHS-Status | Compliant (lead-free TQFP package) | unknown |
| Macro Cells | — | 128 |
| Usable Gates | — | 2,500 |
| User I/Os | — | 80 |
| Anzahl der Pins | — | 100 |
| Propagation Delay (tPD) | — | 10 ns |
| Maximum Internal Frequency | — | 98 MHz |
| Core Supply Voltage | — | 3.0 V to 3.6 V |
| I/O Bank Voltage | — | 1.8 V / 2.5 V / 3.3 V |
| Process Technology | — | CMOS EEPROM |
| Programming Interface | — | JTAG (IEEE 1149.1) ISP |
| PCI Compliance | — | Yes (speed grades -5/-6/-7/-10) |