EPM3128ATI100-5N vs EPM3128ATI10010N Comparison
Detailed side-by-side comparison of EPM3128ATI100-5N by Intel and EPM3128ATI10010N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM3128ATI100-5N - MAX 3000A CPLD, 128 Macrocells, TQFP-100 | Intel / Altera
EPM3128ATI100-5N β ActiveSpecification Comparison
| Parameter | EPM3128ATI100-5N | EPM3128ATI10010N |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $11.45 | $9.10 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 128 | β |
| Logic Array Blocks (LABs) | 8 (16 macrocells per LAB) | 8 |
| User I/O Pins | 80 | β |
| Pin-to-Pin Delay (tPD) | 5.0 ns | β |
| Supply Voltage (VCCINT) | 3.3 V | β |
| I/O Standard | 3.3 V LVCMOS / LVTTL, 5.0 V tolerant inputs | β |
| Programming Method | In-System Programmable via IEEE Std. 1532 (JTAG) | β |
| Operating Temperature | -40C to +85C (Industrial) | 0 C to +70 C (commercial) |
| Package | 100-pin TQFP | 100-pin TQFP |
| Mounting Type | Surface Mount | Surface Mount |
| Configuration Memory | Non-volatile EEPROM | β |
| JTAG Support | IEEE 1149.1 boundary scan | β |
| RoHS Status | Compliant (lead-free TQFP package) | unknown |
| Macro Cells | β | 128 |
| Usable Gates | β | 2,500 |
| User I/Os | β | 80 |
| Number of Pins | β | 100 |
| Propagation Delay (tPD) | β | 10 ns |
| Maximum Internal Frequency | β | 98 MHz |
| Core Supply Voltage | β | 3.0 V to 3.6 V |
| I/O Bank Voltage | β | 1.8 V / 2.5 V / 3.3 V |
| Process Technology | β | CMOS EEPROM |
| Programming Interface | β | JTAG (IEEE 1149.1) ISP |
| PCI Compliance | β | Yes (speed grades -5/-6/-7/-10) |