EPM3256AFI256-10 vs EPM3256AFC256-10N Vergleich
Detaillierter Direktvergleich von EPM3256AFI256-10 von Intel und EPM3256AFC256-10N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EPM3256AFI256-10 - 256-Macrocell CPLD, 10ns, FBGA-256 | Intel
EPM3256AFI256-10 ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EPM3256AFI256-10 | EPM3256AFC256-10N |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Letzte Kaufgelegenheit | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $12,40 | $25,95 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 256 | 256 |
| User I/Os | 161 | — |
| Logic Elements / LABs | 16 Logic Elements per LAB | — |
| Propagation Delay (tPD) | 10 ns | — |
| Supply Voltage - Core | 3.3 V | — |
| I/O Voltage Support | 5.0 V / 3.3 V / 2.5 V (MultiVolt I/O) | — |
| Programmability | In-System Programmable (ISP) via IEEE 1149.1 JTAG | EEPROM, in-system programmable (ISP) |
| Process Technology | CMOS EEPROM | — |
| Package Type | FBGA-256 (FineLine BGA) | — |
| Betriebstemperatur | -40C to +85C (Industrial) | 0 C to 70 C (commercial) |
| Montageart | Surface Mount (BGA) | — |
| RoHS-Status | [DATA_NEEDED: RoHS compliance status] | — |
| Speed Grade | -10 (10 ns pin-to-pin) | — |
| Usable Gates | — | 5,000 gates |
| Maximum User I/O | — | 161 |
| Pin-to-Pin Logic Delay | — | 10 ns |
| Maximum Counter Frequency | — | 227.3 MHz |
| Core Voltage | — | 3.3 V |
| I/O Logic Level Compatibility | — | 5.0 V / 3.3 V / 2.5 V (MultiVolt) |
| JTAG Interface | — | IEEE 1532 / JTAG (TDI, TDO, TMS, TCK) |
| Gehäuse | — | 256-pin FineLine BGA |
| Logic Family | — | CMOS |
| PCI Compliance | — | PCI Local Bus Specification Rev 2.2 (at -10 grade) |