EPM3256AT1144-10S vs EPM3256ATC144-10N Vergleich
Detaillierter Direktvergleich von EPM3256AT1144-10S von Intel und EPM3256ATC144-10N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EPM3256ATC144-10N - 256-Macro CPLD, 10ns, 144-TQFP | Altera
EPM3256ATC144-10N ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EPM3256AT1144-10S | EPM3256ATC144-10N |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $21,30 | $14,50 |
| Family | MAX 3000A | — |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 256 | — |
| Logic Array Blocks (LABs) | 16 | — |
| Maximum User I/O Pins | 212 | — |
| Pin-to-Pin Delay (tPD) | 10 ns | — |
| Gehäuse | TQFP-144 | 144-LQFP (TQFP, ATC suffix) |
| Montageart | Surface Mount | Surface Mount |
| Betriebstemperatur | 0C to +85C (commercial) | 0C to +70C (commercial) [DATA_NEEDED: exact operating-temp grade letter for -10N suffix] |
| Supply Voltage - Core | 3.3 V | — |
| I/O Voltage Support | 2.5V / 3.3V / 5.0V MultiVolt | — |
| Programmable Interconnect | EEPROM-based, non-volatile | — |
| In-System Programming | Yes, via IEEE 1149.1 JTAG | — |
| Configuration Cells | EEPROM (instant-on, no external PROM) | — |
| RoHS-Status | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS compliance - not explicitly confirmed in verified data] |
| Series | — | MAX 3000A |
| Macro Cells | — | 256 |
| Usable Gates | — | 5,000 (up to 10,000 usable in family) |
| Number of I/Os | — | 116 |
| Number of Logic Elements / Blocks | — | 16 LABs |
| Supply Voltage (VCCINT) | — | 3.3 V |
| Propagation Delay (tPD) | — | 10 ns |
| Maximum Counter Frequency | — | 227.3 MHz |
| Global Clocks | — | 3 |
| Global Clear / OE | — | Yes (1 global clear, 1 global OE) |
| Program Memory Type | — | EEPROM (non-volatile, in-system programmable) |
| JTAG Support | — | IEEE Std. 1149.1 with pin-locking |
| ISP Compliance | — | IEEE Std. 1532 |
| Boundary-Scan Test (BST) | — | Built-in, IEEE 1149.1 compliant |
| Lead-Free / Halogen-Free | — | [DATA_NEEDED: not explicitly confirmed in verified data] |