EPM3256AT1144-10S vs EPM3256ATC144-10N 比較
詳細な並列比較: EPM3256AT1144-10S メーカー: Intel および EPM3256ATC144-10N メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM3256AT1144-10S | EPM3256ATC144-10N |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | NRND | ラストバイ |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $21.30 | $14.50 |
| Family | MAX 3000A | — |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 256 | — |
| Logic Array Blocks (LABs) | 16 | — |
| Maximum User I/O Pins | 212 | — |
| Pin-to-Pin Delay (tPD) | 10 ns | — |
| パッケージ | TQFP-144 | 144-LQFP (TQFP, ATC suffix) |
| 実装タイプ | Surface Mount | Surface Mount |
| 動作温度 | 0C to +85C (commercial) | 0C to +70C (commercial) [DATA_NEEDED: exact operating-temp grade letter for -10N suffix] |
| Supply Voltage - Core | 3.3 V | — |
| I/O Voltage Support | 2.5V / 3.3V / 5.0V MultiVolt | — |
| Programmable Interconnect | EEPROM-based, non-volatile | — |
| In-System Programming | Yes, via IEEE 1149.1 JTAG | — |
| Configuration Cells | EEPROM (instant-on, no external PROM) | — |
| RoHS ステータス | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS compliance - not explicitly confirmed in verified data] |
| Series | — | MAX 3000A |
| Macro Cells | — | 256 |
| Usable Gates | — | 5,000 (up to 10,000 usable in family) |
| Number of I/Os | — | 116 |
| Number of Logic Elements / Blocks | — | 16 LABs |
| Supply Voltage (VCCINT) | — | 3.3 V |
| Propagation Delay (tPD) | — | 10 ns |
| Maximum Counter Frequency | — | 227.3 MHz |
| Global Clocks | — | 3 |
| Global Clear / OE | — | Yes (1 global clear, 1 global OE) |
| Program Memory Type | — | EEPROM (non-volatile, in-system programmable) |
| JTAG Support | — | IEEE Std. 1149.1 with pin-locking |
| ISP Compliance | — | IEEE Std. 1532 |
| Boundary-Scan Test (BST) | — | Built-in, IEEE 1149.1 compliant |
| Lead-Free / Halogen-Free | — | [DATA_NEEDED: not explicitly confirmed in verified data] |