EPM3512AFC256-21 vs EPM3512AFC256-10 Vergleich
Detaillierter Direktvergleich von EPM3512AFC256-21 von Altera und EPM3512AFC256-10 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM3512AFC256-21 | EPM3512AFC256-10 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $18,75 | $17,50 |
| Device Family | MAX 3000A | — |
| Logic Elements / Macrocells | 512 macrocells | — |
| Usable Gates | 10,000 | 10,000 |
| Logic Array Blocks (LABs) | 16 | 16 |
| Maximum Operating Frequency | 87 MHz | — |
| Gehäuse | FBGA-256 (FineLine BGA) | 256-pin FBGA |
| Betriebstemperatur | -40C to +85C (industrial) | — |
| Supply Voltage - Core (VCCINT) | 3.3 V | — |
| I/O Supply Voltage (VCCIO) | 2.5 V / 3.3 V / 5.0 V (multi-volt I/O) | — |
| Programmable Pins (max) | [DATA_NEEDED: maximum user I/O pin count] | — |
| Programming Interface | JTAG / IEEE Std. 1532 ISP | — |
| Speichertyp | Non-volatile EPROM/EEPROM cell array | — |
| Montageart | Surface Mount (BGA) | Surface Mount |
| RoHS-Status | [DATA_NEEDED: RoHS compliance status] | unknown |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Family | — | MAX 3000A |
| Macrocells | — | 512 |
| Maximum I/O Pins | — | 208 |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Maximum Counter Frequency | — | 87 MHz |
| Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Voltage Tolerance | — | 5-V tolerant |
| Programmable Technology | — | CMOS EEPROM |
| In-System Programmability | — | Yes (IEEE Std. 1149.1 JTAG / IEEE Std. 1532) |
| Betriebstemperaturbereich | — | [DATA_NEEDED: industrial/commercial operating temperature range] |
| Pin-Anzahl | — | 256 |
| Architecture | — | MAX (Multiple Array matriX) EEPROM-based |