EPM3512AFI256-7N vs EPM3512ATI256-10N Vergleich
Detaillierter Direktvergleich von EPM3512AFI256-7N von Altera und EPM3512ATI256-10N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EPM3512AFI256-7N - MAX 3000A CPLD, 512 Macrocells | Intel / Altera
EPM3512AFI256-7N ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EPM3512AFI256-7N | EPM3512ATI256-10N |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Letzte Kaufgelegenheit | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $27,95 | $19,85 |
| Family | MAX 3000A | MAX 3000A |
| Device Logic Elements / Macrocells | 512 macrocells | — |
| Typical Usable Gates | 10,000 gates | — |
| Logic Array Blocks (LABs) | 16 | 16 |
| Maximum User I/O Pins | [DATA_NEEDED: user I/O count] | — |
| Maximum Operating Frequency (fMAX) | 116.3 MHz | — |
| Pin-to-Pin Delay (tPD, speed grade -7) | approximately 7.5 ns | — |
| Supply Voltage (VCCINT) | 3.3 V | — |
| MultiVolt I/O Levels | 2.5 V / 3.3 V / 5 V mixed | — |
| Configuration Memory | Non-volatile EEPROM | — |
| Programming Interface | IEEE 1149.1 JTAG (in-system programmable) | — |
| Gehäuse | 256-ball FBGA | 256-pin BGA (TI256) |
| Betriebstemperaturbereich | -40C to +85C (industrial) | — |
| Lead-Free / RoHS | Yes ('N' suffix, lead-free) | — |
| Design Software | Quartus II (legacy MAX 3000A support) | — |
| Speed Grade | -7 | -10 (10 ns pin-to-pin delay) |
| Montageart | Surface Mount (BGA) | Surface Mount |
| Manufacturer | — | Intel (formerly Altera Corporation) |
| Device | — | EPM3512A |
| Macrocells | — | 512 |
| Usable Gates | — | 10,000 |
| Maximum User I/O | — | 212 |
| Betriebstemperatur | — | -40C to +85C (Industrial) |
| Core Voltage | — | 3.3 V |
| I/O Voltage Support | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V / 5.0 V (MultiVolt) |
| Programming Technology | — | EEPROM (non-volatile, in-system programmable) |
| JTAG Support | — | IEEE Std 1149.1 boundary-scan, 4-pin JTAG |
| Programmable Security Bit | — | Yes (design protection) |
| RoHS-Status | — | [DATA_NEEDED: RoHS status] |
| Lebenszyklusstatus | — | Obsolete / Last Time Buy (per Altera product discontinuation notices) |